mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 318

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

14.4.10 Period/Pulse-Width Accumulator (PPWA)
14.4.11 Quadrature Decode (QDEC)
14-10
MOTOROLA
Refer to TPU programming note Stepper Motor (SM) TPU Function (TPUPN13/D) for
more information.
The period/pulse-width accumulator algorithm accumulates a 16-bit or 24-bit sum of
either the period or the pulse width of an input signal over a programmable number of
periods or pulses (from one to 255). After an accumulation period, the algorithm can
generate a link to a sequential block of up to eight channels. The user specifies a start-
ing channel of the block and number of channels within the block. Generation of links
depends on the mode of operation. Any channel can be used to measure an accumu-
lated number of periods of an input signal. A maximum of 24 bits can be used for the
accumulation parameter. From one to 255 period measurements can be made and
summed with the previous measurement(s) before the TPU2 interrupts the CPU, al-
lowing instantaneous or average frequency measurement, and the latest complete ac-
cumulation (over the programmed number of periods).
The pulse width (high-time portion) of an input signal can be measured (up to 24 bits)
and added to a previous measurement over a programmable number of periods (one
to 255). This provides an instantaneous or average pulse-width measurement capa-
bility, allowing the latest complete accumulation (over the specified number of periods)
to always be available in a parameter. By using the output compare function in con-
junction with PPWA, an output signal can be generated that is proportional to a spec-
ified input signal. The ratio of the input and output frequency is programmable. One or
more output signals with different frequencies, yet proportional and synchronized to a
single input signal, can be generated on separate channels.
Refer to TPU programming note Period/Pulse-Width Accumulator (PPWA) TPU Func-
tion (TPUPN11/D) for more information.
The quadrature decode function uses two channels to decode a pair of out-of-phase
signals in order to present the CPU16 with directional information and a position value.
It is particularly suitable for use with slotted encoders employed in motor control. The
function derives full resolution from the encoder signals and provides a 16-bit position
counter with rollover/under indication via an interrupt.
The counter in parameter RAM is updated when a valid transition is detected on either
one of the two inputs. The counter is incremented or decremented depending on the
lead/lag relationship of the two signals at the time of servicing the transition. The user
can read or write the counter at any time. The counter is free running, overflowing to
$0000 or underflowing to $FFFF depending on direction.
The QDEC function also provides a time stamp referenced to TCR1 for every valid sig-
nal edge and the ability for the host CPU to obtain the latest TCR1 value. This feature
allows position interpolation by the host CPU between counts at very slow count rates.
Refer to TPU programming note Quadrature Decode (QDEC) TPU Function
(TPUPN20/D) for more information.
Freescale Semiconductor, Inc.
For More Information On This Product,
TIME PROCESSOR UNIT 2
Go to: www.freescale.com
MC68HC16Y3/916Y3
USER’S MANUAL