mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 160

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.7.5.2 Reset States of Pins Assigned to Other MCU Modules
5.7.6 Reset Timing
5-52
MOTOROLA
As a rule, module pins that are assigned to general-purpose I/O ports go into a high-
impedance state following reset. However, during power-on reset, module port pins
may be in an indeterminate state for a short period. Refer to 5.7.7 Power-On Reset for
more information.
The RESET input must be asserted for a specified minimum period for reset to occur.
External RESET assertion can be delayed internally for a period equal to the longest
bus cycle time (or the bus monitor timeout period) in order to protect write cycles from
being aborted by reset. While RESET is asserted, SCIM2 pins are either in an inactive,
high impedance state or are driven to their inactive states.
When an external device asserts RESET for the proper period, reset control logic
clocks the signal into an internal latch. The control logic drives the RESET pin low for
an additional 512 CLKOUT cycles after it detects that the RESET signal is no longer
being externally driven to guarantee this length of reset to the entire system.
CS[9:6]/ADDR[22:19]/PC[6:3]
CS[5:3]/FC[2:0]/PC[2:0]
CS10/ADDR23/ECLK
IRQ[7:1]/PF[7:1]
SIZ[1:0]/PE[7:6]
FASTREF/PF0
DSACK0/PE0
DSACK1/PE1
CSE/BGACK
ADDR[18:0]
DATA[15:0]
CSBOOT
CLKOUT
CSM/BG
CS0/BR
AS/PE5
DS/PE4
RESET
Pin(s)
BERR
HALT
R/W
TSC
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 5-21 SCIM2 Pin Reset States
While RESET
Mode Select
Mode select
Mode select
Pin State
Asserted
Asserted
High-Z
High-Z
High-Z
Output
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
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Pin Function
ADDR[18:0]
DATA[15:0]
FASTREF
CSBOOT
CLKOUT
DSACK0
DSACK1
IRQ[7:1]
SIZ[1:0]
CS[9:6]
CS[5:3]
RESET
BERR
HALT
CS10
TSC
CS1
CS2
CS0
R/W
Default Function
AS
DS
Pin State After RESET Released
Pin State
Unknown
Unknown
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
SS
DD
Pin Function
ADDR[22:19]
ADDR[18:0]
DATA[15:0]
CSBOOT
CLKOUT
ADDR23
BGACK
RESET
FC[2:0]
PF[7:1]
PE[7:6]
BERR
HALT
Alternate Function
TSC
PE5
PE4
PE0
PE1
PF0
R/W
BG
BR
MC68HC16Y3/916Y3
USER’S MANUAL
Pin State
Unknown
Unknown
Unknown
Unknown
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
V
V
DD
SS