mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 457

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
PCLKS — PCLK Pin State (Read Only)
I4/O5 — Input Capture 4/Output Compare 5
PACLK[1:0] — Pulse Accumulator Clock Select (Gated Mode)
PACNT — Pulse Accumulator Counter
D.9.8 Input Capture Registers 1-3
TIC[1:3] — Input Capture Registers 1–3
D.9.9 Output Compare Registers 1-4
TOC[1:4] — Output Compare Registers 1–4
MC68HC16Y3/916Y3
USER’S MANUAL
Table D-48 shows the PACLK[1:0] bit field effects.
Eight-bit read/write counter used for external event counting or gated time accumula-
tion.
The input capture registers are 16-bit read-only registers used to latch the value of
TCNT when a specified transition is detected on the corresponding input capture pin.
They are reset to $FFFF.
The output compare registers are 16-bit read/write registers which can be used as out-
put waveform controls or as elapsed time indicators. For output compare functions,
they are written to a desired match value and compared against TCNT to control spec-
ified pin actions. They are reset to $FFFF.
0 = Output compare 5 enabled
1 = Input capture 4 enabled
PAMOD
0
0
1
1
PACLK[1:0]
Table D-47 PAMOD and PEDGE Effects
Freescale Semiconductor, Inc.
For More Information On This Product,
PEDGE
00
01
10
11
Table D-48 PACLK[1:0] Effects
0
1
0
1
Go to: www.freescale.com
Pulse Accumulator Clock Selected
Same clock used to increment TCNT
PAI falling edge increments counter
PAI rising edge increments counter
System clock divided by 512
Zero on PAI inhibits counting
One on PAI inhibits counting
External clock, PCLK
TOF flag from TCNT
Effect
$YFF914 – $YFF91A
$YFF90E – $YFF912
MOTOROLA
D-79

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