mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 221

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

10.7.7 Successive Approximation Register
10.7.8 Result Registers
MC68HC16Y3/916Y3
USER’S MANUAL
The successive approximation register (SAR) accumulates the result of each conver-
sion one bit at a time, starting with the most significant bit.
At the start of the resolution period, the MSB of the SAR is set, and all less significant
bits are cleared. Depending on the result of the first comparison, the MSB is either left
set or cleared. Each successive bit is set or left cleared in descending order until all
eight or ten bits have been resolved.
When conversion is complete, the content of the SAR is transferred to the appropriate
result register. Refer to APPENDIX D REGISTER SUMMARY for register mapping
and configuration.
Result registers are used to store data after conversion is complete. The registers can
be accessed from the IMB under ABIU control. Each register can be read from three
different addresses in the ADC memory map. The format of the result data depends
on the address from which it is read. Table 10-9 shows the three types of formats.
SAMPLE
INITIAL
TIME
CH 1
1
SAMPLE AND TRANSFER
SCF FLAG SET HERE AND SEQUENCE
TRANSFER
PERIOD
6 CYCLES
ENDS IF IN THE 4-CHANNEL MODE
TIME
CH 2
(2 ADC CLOCKS)
SAMPLE
FINAL
TIME
Freescale Semiconductor, Inc.
Figure 10-3 10-Bit Conversion Timing
CH 3
For More Information On This Product,
ANALOG-TO-DIGITAL CONVERTER
CYCLES
SAR9
2
Go to: www.freescale.com
CH 4
CYCLE
SAR8
1
SUCCESSIVE APPROXIMATION
CYCLE
SAR7
1
CH 5
CYCLE
SAR6
1
RESOLUTION TIME
SEQUENCE
SCF FLAG SET HERE AND SEQUENCE
CYCLE
SAR5
1
ENDS IF IN THE 8-CHANNEL MODE
CH 6
CYCLE
SAR4
1
CYCLE
SAR3
1
CYCLE
SAR2
CH 7
1
CYCLE
SAR1
TRANSFER CONVERSION TO
RESULT REGISTER AND SET
1
CYCLE
SAR0
1
CH 8
CYCLE
END
CCF
EOC
1
16
MOTOROLA
16 ADC 10-BIT TIM
10-13