cs89712 Cirrus Logic, Inc., cs89712 Datasheet - Page 71

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cs89712

Manufacturer Part Number
cs89712
Description
High-performance, Low-power System-on-chip With 10base-t Ethernet Controller
Manufacturer
Cirrus Logic, Inc.
Datasheet
3.2 Accessing Ethernet Port Registers
Registers for the Ethernet port are accessed through
two memory ranges; first, a 16-byte window of
eight 16-bit registers (shown in
at address 0x2000.0300; and additional registers in
a 4 Kbyte internal memory page listed in
The registers at 0x2000.0300 are always immedi-
ately accessable, however registers mapped into
the 4 Kbyte page must be accessed through an in-
dex using the Ethernet Port pointer and Ethernet
Data Ports.
DS502PP2
Big Endian Mode
0X8000.00C3
0x8000.0002
0x8000.0001
0x8000.0000
0x8000.0043
0x8000.0042
0x8000.0041
0x8000.0040
0x8000.0083
Memory Location
1. The following register descriptions refer to Little Endian Mode Only.
0x2000.030C
0x2000.030A
0x2000.030E
0x2000.0300
0x2000.0302
0x2000.0304
0x2000.0306
0x2000.0308
PBDDR
PDDDR
PEDDR
PADDR
PBDR
PDDR
PEDR
Name
Table 32. CS89712 Internal Registers (Big Endian Mode)
Figure
Table 33. Ethernet Port Register Window
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Write-only
Write-only
Default
Type
33) located
0
0
0
0
0
0
0
Figure
36.
RD/WR
RW
RW
RW
RW
RW
RW
RW
This is done by writing the offset of the target reg-
ister to the Ethernet Port Pointer. For example, the
EEPROM data register has an offset of 0042h. The
contents of the target register are then mapped into
the Ethernet Data Port.
If the software needs to access a sequential block of
registers, the MSB of the Ethernet Port address of
the first word to be accessed should be set to "1".
The Ethernet Port Pointer will then move to the
next word location automatically, eliminating the
need to setup the Ethernet Port Pointer between
successive accesses (see
Size
Receive/Transmit Data (Port 0)
Receive/Transmit Data (Port 1)
TxCMD (Transmit Command)
8
8
8
8
8
8
8
3
3
TxLength (Transmit Length)
Ethernet Port Data (Port 0)
Ethernet Port Data (Port 1)
Interrupt Status Queue
Ethernet Port Pointer
Port B Data register
Reserved
Port D Data register
Port A data Direction register
Port B Data Direction register
Reserved
Port D Data Direction register
Port E Data Register
Port E Data Direction register
Description
Figure
Comments
22).
CS89712
71

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