cs89712 Cirrus Logic, Inc., cs89712 Datasheet - Page 29

• Manufacturer Part Number: cs89712
• Description: High-performance, Low-power System-on-chip With 10base-t Ethernet Controller
• Manufacturer: Cirrus Logic, Inc.

tial that software monitors the appropriate status
registers within the CL-PS6700s to ensure that
there are no pending posted bus transactions before
the Standby State is entered. Failure to do this will
result in incomplete PC Card accesses.
2.15 Endianness
The CS89712 uses a little endian configuration for
internal registers. However, it is possible to con-
nect the device to a big endian external memory
system. The big-endian / little-endian bit in the
ARM720T control register sets whether the
CS89712 treats words in memory as being stored in
big endian or little endian format. Memory is
viewed as a linear collection of bytes numbered up-
wards from zero. Bytes 0 to 3 hold the first stored
word, bytes 4 to 7 the second, and so on. In the little
endian scheme, the lowest numbered byte in a word
is considered to be the least significant byte of the
DS502PP2
Address (W/B) Data in Memory
Word + 0 (W)
Word + 1 (W)
Word + 2 (W)
Word + 3 (W)
Word + 0 (H)
Word + 1 (H)
Word + 2 (H)
Word + 3 (H)
Word + 0 (B)
Word + 1 (B)
Word + 2 (B)
Word + 3 (B)
Note: dc = don’t care
11223344
11223344
11223344
11223344
11223344
11223344
11223344
11223344
11223344
11223344
11223344
11223344
(as seen by the
CS89712)
Table 19. Effect of Endianness on Read Operations
7:0 15:8 23:16 31:24 7:0 15:8 23:16 31:24 Big Endian Little Endian
44
44
44
44
44
44
dc
dc
dc
dc
dc
44
Big Endian Memory
Byte Lanes to Memory / Ports / Registers
33
33
33
33
dc
dc
33
33
dc
dc
33
dc
22
22
22
22
22
22
22
dc
dc
dc
dc
dc
11
11
11
11
11
11
dc
dc
11
dc
dc
dc
word and the highest numbered byte is the most
significant. Byte 0 of the memory system should be
connected to D[7:0] in this case. In the big endian
scheme the most significant byte of a word is stored
at the lowest numbered byte, and the least signifi-
cant byte is stored at the highest numbered byte.
Therefore, byte 0 of the memory system should be
connected to D[31:24]. Load and store are the only
instructions affected by the Endianness.
Table 19
the CS89712 for read and write operations, includ-
ing the effect of performing non-aligned word ac-
cesses. The register definition section defines the
behavior of the internal CS89712 registers in the
big endian mode in more detail. For further infor-
mation, refer to ARM Application Note 61, “Big
and Little Endian Byte Addressing”.
Little Endian Memory
44
44
44
44
44
44
44
dc
dc
dc
dc
dc
33
33
33
33
33
33
33
dc
dc
dc
dc
dc
and
Table 20
22
22
22
22
dc
dc
22
22
dc
dc
22
dc
11
11
11
11
dc
dc
11
11
dc
dc
dc
11
demonstrate the behavior of
11223344
44112233
33441122
22334411
00001122
22000011
00003344
44000033
00000011
00000022
00000033
00000044
R0 Contents
CS89712
11223344
44112233
33441122
22334411
00003344
44000033
00001122
22000011
00000044
00000033
00000022
00000011
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