cs89712 Cirrus Logic, Inc., cs89712 Datasheet - Page 15

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cs89712

Manufacturer Part Number
cs89712
Description
High-performance, Low-power System-on-chip With 10base-t Ethernet Controller
Manufacturer
Cirrus Logic, Inc.
Datasheet
ignored) of all the bytes in the Reset Configuration
Block, excluding the checksum byte. This sum in-
cludes the Reset Configuration Block header at ad-
dress 00h. Since the checksum is calculated as the
2’s complement of the sum of all preceding bytes in
the Reset Configuration Block, a total of 0 should
result when the checksum value is added to the sum
of the previous bytes.
2.6.6
Table 5
Block stored in a C46 EEPROM. Note that little-
endian word ordering is used, i.e., the least signifi-
cant word of a multiword datum is located at the
lowest address.
2.6.7
If the EEDI pin is asserted high at the end of reset,
the Ethernet port reads the first word of EEPROM
data by:
1) Asserting EECS.
2) Clocking out a Read-Register-00h command
3) Clocking the data in on EEDI.
If the EEDI pin is low at the end of the reset signal,
the Ethernet port does not perform an EEPROM
read-out (uses its default configuration).
DS502PP2
on EEDO (EESK provides a 1 MHz serial
clock signal).
shows an example of a Reset Configuration
EEPROM Example
EEPROM Read-out
Number of Words
F E
in Group
D C
First Word of a Group of Words
B A
Figure 3. Group Header
0
0
9 8
0
7 6
9-bit PacketPage Address
2.6.7.1
The Ethernet port determines the size of the EE-
PROM by checking the sense of EEDI on the tenth
rising edge of EESK. If EEDI is low, the EEPROM
is a ’C46 or ’CS46. If EEDI is high, the EEPROM
is a ’C56, ’CS56, ’C66, or ’CS66.
2.6.7.2
The Ethernet port reads in the first word from the
EEPROM to determine if configuration data is con-
tained in the EEPROM. If configuration data is not
stored in the EEPROM, the Ethernet port termi-
nates initialization from EEPROM and operates us-
ing its default configuration (See
configuration data is stored in EEPROM, the Ether-
net port automatically loads all configuration data
stored in the Reset Configuration Block into its in-
ternal Ethernet Port registers.
2.6.8
Once all the configuration data are transferred to
the appropriate Ethernet Port registers, the Ethernet
port performs a checksum calculation to verify the
Reset Configuration Blocks data are valid. If the re-
sulting total is 0, the read-out is considered valid.
Otherwise, the Ethernet port initiates a partial reset
to restore the default configuration.
If the read-out is valid, the EEPROMOK bit
(SelfST register, bit A) is set. EEPROMOK is
5 4
3 2
EEPROM Read-out Completion
Determining EEPROM Size
Loading Configuration Data
1 0
CS89712
Table
2). If
15

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