PM7312 pmc-sierra, PM7312 Datasheet - Page 39

• Manufacturer Part Number: PM7312
• Description: Freedm 32a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
Pin Name
RMOD
RERR
RVAL
Type
Tristate
Output
Tristate
Output
Tristate
Output
Pin No.
W4
W1
W2
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Function
contain the last data byte of a packet.
REOP is tristated when the FREEDM 32A1024L device is not
selected via the RENB signal.
Any-PHY Level 3 Mode:
When REOP is set high, RXDATA[7:0] contains the last data byte
of a packet. When REOP is set low, RXDATA[7:0] does not contain
the last data byte of a packet.
Any-PHY Level 2 Mode:
The receive word modulo signal (RMOD) indicates the size of the
current word on RXDATA[15:0]. When RXDATA[15:0] does not
contain the last byte of a packet (REOP set low), RMOD is set low.
When RMOD is set high and REOP is set high, RXDATA[15:8]
contains the last data byte of a packet. When RMOD is set low
and REOP is set high, RXDATA[7:0] contains the last byte of the
packet, or optionally, the error status byte. The behavior of RMOD
relates only to packet data and is unaffected when the FREEDM
32A1024L device is programmed to overwrite RXDATA[7:0] with
status information when erred packets are received.
RMOD is tristated when the FREEDM 32A1024L device is not
selected via the RENB signal.
RMOD is updated on the rising edge of RXCLK.
Any-PHY Level 3 Mode:
RMOD is not used. The last valid byte of data on RXDATA[7:0] is
sampled when REOP is sampled high.
RMOD is tristated when the FREEDM 32A1024L is operating in
Any-PHY level 3 mode.
The receive error signal (RERR) indicates that the current packet is
erred and should be discarded.
RERR is updated on the rising edge of RXCLK.
The receive error signal (RERR) indicates that the current packet is
erred and should be discarded. When RXDATA[15:0] (Any-PHY
Level 2 mode) or RXDATA[7:0] (Any-PHY Level 3 mode) does not
contain the last byte of a packet (REOP set low), RERR is set low.
When RERR is set high and REOP is set high, the current packet
is erred. When RERR is set low and REOP is set high, the current
packet is not erred.
The FREEDM 32A1024L may be programmed to overwrite
RXDATA[7:0] of the final word of each packet transfer (REOP set
high) with the status of packet reception when that packet is erred
(RERR is high).
Any-PHY Level 2 Mode:
RERR is tristated when the FREEDM 32A1024L device is not
selected via the RENB signal.
Any-PHY Level 3 Mode:
RERR is driven low when the FREEDM 32A1024L device is not
selected via the RENB signal.
The receive data valid (RVAL) is asserted when packet data is
being output on RXDATA. It is de-asserted whenever the FREEDM
32A1024L device is selected, but not outputting packet data on
RXDATA[15:0]. (E.g., when RSX is high and address prepend is
being output on RXDATA, RVAL is de-asserted.)
RVAL is updated on the rising edge of RXCLK.
Released
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