PM7312 pmc-sierra, PM7312 Datasheet - Page 174

• Manufacturer Part Number: PM7312
• Description: Freedm 32a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
Register 0x610: TAPI Status Register
The Status Register contains flag bits reflecting the current status of TAPI-12. This register does not
remain set when the condition is not present.
FULL
Reserved
The full bit (FULL) reports the instantaneous full status of the circular FIFO. It is set high when
free space in the circular FIFO is smaller than a complete data segment and TSX is sampled
high. When the full bit is high, it shows that the reader controller has not been able to empty the
circular FIFO fast enough to keep pace with the writer controller. When TAPI-12 operates in
non-blocking mode, the writer controller risks overflowing the circular FIFO when the full bit
is set high.
This bit should be ignored.
Bit
Bit 31
To
Bit 2
Bit 1
Bit 0
Type
—
R
R
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
Reserved
FULL
Default
X
0
0
Released
174