PM7312 pmc-sierra, PM7312 Datasheet - Page 32

• Manufacturer Part Number: PM7312
• Description: Freedm 32a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
Pin Name
TXADDR[0]
TXADDR[1]
TXADDR[2]
TXADDR[3]
TXADDR[4]
TXADDR[5]
TXADDR[6]
TXADDR[7]
TXADDR[8]
TXADDR[9]
TXADDR[10]
TXADDR[11]
TXADDR[12]
TXADDR[13]
TXADDR[14]
TXADDR[15]
TPA_LO
TPA_HI
Type
Input
Tristate
Output
Pin No.
V5
V4
V3
V2
V1
U5
U4
U3
U2
U1
R1
R2
R5
P1
P2
P3
P4
R3
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Function
Any-PHY packet interface.
Any-PHY Level 2 Mode:
TXCLK is a nominally 50% duty cycle, 25 to 52 MHz clock.
Any-PHY Level 3 Mode:
TXCLK is a nominally 50% duty cycle, 50 to 104 MHz clock.
The transmit address signals (TXADDR[15:0]) provide a channel
address for polling a transmit Any-PHY channel FIFO. The
FREEDM 32A1024L compares the TXADDR[15:0] to the base and
range registers to determine if the Any-PHY channel being polled
resides within the FREEDM 32A1024L. An Any-PHY channel with
an address that is greater than or equal to the base register and
less than or equal to the maximum address as defined by the range
plus channel base address resides within the FREEDM 32A1024L.
The TXADDR[15:0] signals are sampled on the rising edge of
TXCLK.
The transmit packet available (TPA_xx) signals reflect the status of
a poll of a transmit Any-PHY channel FIFO pair. TPA_LO returns
the polled results for the low priority FIFO queue for Any-PHY
channel address ‘n’ provided on TXADDR[15:0] and TPA_HI
returns the results for the high priority queue. TPA_xx are coded
as follows:
TPA_xx = “1” => FIFO has space available.
TPA_xx = “0” => FIFO is full
The thresholds, which determine whether or not a FIFO has space,
are individually programmable for each channel and priority.
It is the responsibility of the external controller to prevent Any-PHY
channel underflow or overflow conditions by adequately polling
each channel before data transfer.
TPA_xx are updated on the rising edge of TXCLK. TPA_xx are
tristate during reset.
Any-PHY Level 2 Mode:
TPA_xx are tristate when an Any-PHY channel address other than
Any-PHY channels residing in the FREEDM is provided on
TXADDR[15:0]. An Any-PHY channel with an address that is less
than the channel base address register or outside the range
address register within the FREEDM 32A1024L is identified as an
Any-PHY channel that does not reside within the FREEDM
32A1024L.
TPA_xx are tristate when an unprovisioned channel is polled.
It is recommended that TPA_xx be connected externally to a weak
pull-down, e.g. 470W.
Any-PHY Level 3 Mode:
TPA_xx return the value “0” when an Any-PHY channel address
other than Any-PHY channels residing in the FREEDM is provided
on TXADDR[15:0]. The TPA poll response is invalid if it
corresponds to a TXADDR poll coincident with the start of a
segment transfer (i.e. on the cycle in which TSX is driven high).
Released
32