PM7312 pmc-sierra, PM7312 Datasheet - Page 204

• Manufacturer Part Number: PM7312
• Description: Freedm 32a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
FUNC_MODE
ECC_OFF
DECC
Reserved
When set, this bit indicates that the RS_DRAMC is in “Functional Mode”, i.e., it is ready to
perform accesses to the Resequencing Buffer. When the Free Pool Pointer (FPP) FIFO is
initialized by the RS_DRAMC this bit will be automatically set by the RS_DRAMC at the end
of the FPP FIFO initialization procedure. Otherwise this bit needs to be set by the
microprocessor (when it finishes initializing the FPP FIFO).
Setting this bit turns ECC off. ECC will not be added or corrected. When using the
microprocessor interface to access the SDRAMs, this bit must be set to 1.
The diagnostic ECC bit (DECC) configures DRAMC to logically invert the ECC for diagnostic
purposes. When DECC is a logic one, ECC generated will be inverted. When DECC is a logic
zero, a correct ECC will be generated.
The reserved bit must be set low for correct operation of the FREEDM 32A1024L device.
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Released
204