PM7312 pmc-sierra, PM7312 Datasheet - Page 249
PM7312
Manufacturer Part Number
PM7312
Description
Freedm 32a1024l Assp Telecom Standard Datasheet
Manufacturer
pmc-sierra
Datasheet
1.PM7312.pdf
(283 pages)
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Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
13
13.1 JTAG Support
Operation
This section presents operating details for the JTAG boundary scan feature.
The FREEDM 32A1024L supports the IEEE Boundary Scan Specification as described in the IEEE
1149.1 standards. The Test Access Port (TAP) consists of the five standard pins, TRSTB, TCK,
TMS, TDI and TDO used to control the TAP controller and the boundary scan registers. The
TRSTB input is the active low reset signal used to reset the TAP controller. TCK is the test clock
used to sample data on input, TDI and to output data on output, TDO. The TMS input is used to
direct the TAP controller through its states. The basic boundary scan architecture is shown below.
Figure 35 Boundary Scan Architecture
The boundary scan architecture consists of a TAP controller, an instruction register with instruction
decodes, and a bypass register, a device identification register and a boundary scan register. The
TAP controller interprets the TMS input and generates control signals to load the instruction and
data registers. The instruction register with instruction decode block is used to select the test to be
executed and/or the register to be accessed. The bypass register offers a single bit delay from
primary input, TDI to primary output , TDO. The device identification register contains the device
identification code.
The boundary scan register allows testing of board inter-connectivity. The boundary scan register
consists of a shift register placed in series with device inputs and outputs. Using the boundary scan
TRSTB
TMS
TCK
TDI
Controller
Access
Test
Port
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Device Identification
Control
Tri-state Enable
Select
Boundary Scan
Instruction
Register
Register
Register
Register
Decode
Bypass
and
Mux
DFF
TDO
Released
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