PM7312 pmc-sierra, PM7312 Datasheet - Page 255

• Manufacturer Part Number: PM7312
• Description: Freedm 32a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
The FREEDM 32A1024L automatically deselects at the end of all burst data transfers. The
FREEDM 32A1024L must be reselected before any further data will be transferred across the Rx
APPI.
The RVAL and REOP signals indicate the presence and end of valid packet data respectively. The
RERR and RMOD signals are only valid at the end of a packet and are qualified with the REOP
signal. When a packet is erred, the FREEDM 32A1024L may be programmed to overwrite
RXDATA[15:0] in the final word of packet transfer with status information indicating the cause of
the error. RXDATA[15:0] is not modified if a packet is error free.
The RXADDR[3:0] signals serve to poll FREEDM 32A1024L devices as well as for selection.
During data transfer, the RXADDR[3:0] signals continue to poll the FREEDM 32A1024L devices
sharing the Rx APPI. Polled results are returned on the RPA signal. Note that each poll address is
separated by a NULL address to generate tristate turn-around cycle in order to prevent multiple
FREEDM 32A1024L devices from briefly driving RPA. If RPA is a point-to-point signal for each
FREEDM 32A1024L device on the board, then the tristate turn-around cycle is not required,
thereby effectively doubling the polling bandwidth at the expense of extra signals.
Polled results reflect the status of the Rx APPI. Polled responses always refer to the next segment
transfer. In other words, polled responses during or after the RXCLK cycle where RSX is set high
refer to a segment that is not involved in the current data transfer. This allows the external controller
to gather knowledge about the segment not involved in the current segment transfer so that it can
anticipate reselecting that FREEDM 32A1024L device (via RENB) to maximize bandwidth on the
Rx APPI (shown in Figure 41).
Figure 40 Receive APPI Timing (Auto Deselection)
RXDATA[15:0]
Figure 40 shows the transfer of a 100 word packet across the Rx APPI from FREEDM 32A1024L
device 0, channel 2 followed by the transfer of a 2 word packet from FREEDM 32A1024L device
0, channel 8. More importantly, Figure 40 illustrates that, for back-to-back transfers from the same
FREEDM 32A1024L (device 0), it must be reselected before any further data is provided on the Rx
APPI.
At the end of the first 100 word packet transfer across the Rx APPI, the FREEDM 32A1024L
automatically deselects and must be reselected before the second two word packet is transferred.
When the external controller samples REOP high, it recognizes that the burst transfer has
completed. Two RXCLK cycles later, the external controller reselects FREEDM 32A1024L device
RXADDR[3:0]
RXCLK
RMOD
RSOP
REOP
RENB
RERR
RVAL
RPA
RSX
Dev 0
NULL
Dev 7
Dev 0
NULL
CH 2
Dev 6
Dev 7
D0
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Dev 0
Dev 0
NULL
D1
Dev 4
D98
D99
NULL
Dev 4
Dev 0
NULL
Dev 0
Dev 3
CH 8
NULL
Dev 0
Dev 0
D0
Dev 2
Dev 3
D1
Released
255
NULL
Dev 2