CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 99
CDC3205G-C
Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
1.CDC3205G-C.pdf
(260 pages)
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PRELIMINARY DATA SHEET
13. Port Interrupts
Port interrupts are the interface of the Interrupt Controller to
the external world. Six U-Port pins and alternatively six P-
Port pins are connected to the module via their special input
lines (Fig. 13–1). HW Option programmable multiplexers
define which port signal is actually connected to the Trigger
Mode Logic (Table 13–1). The P-Ports are actually analog
input ports, thus Schmitt Triggers are enabled if the P-Ports
are selected as port interrupts. The input sampling frequency
is f
SLOW modes.
Fig. 13–1:
The user can define the trigger mode for each port interrupt
by the interrupt port mode register.
The Trigger Mode defines on which edge of the interrupt
source signal the Interrupt Controller is triggered. The trig-
gering of the Interrupt Controller is shown in figure 13–2.
For the effect of CPU clock modes on the operation of this
module refer to section “CPU and Clock System” (see
Table 4–1 on page 37).
Precautions
Parallel usage of a P-Port as analog and port interrupt input
is possible but not recommended. In this case the Schmitt
Micronas
U1.7
P1.2
U1.6
P1.3
U1.5
P1.4
U8.5
P1.5
U0.5
P1.6
U0.4
P1.7
0perm
HW Option
PM.PINT
, which is not disabled by CPU SLOW or DEEP
Port Interrupts
0
1
PINT0
PINT1
PINT2
PINT3
PINT4
PINT5
f
0perm
IRPM0
IRPM1
Trigger
Mode
Trigger
Mode
PINT0
Interrupt
Source
PINT1
Interrupt
Source
PINT2
Interrupt
Source
PINT3
Interrupt
Source
PINT4
Interrupt
Source
PINT5
Interrupt
Source
June 12, 2003; 6251-579-1PD
Trigger input circuit is enabled. This is the reason why input
levels other than AV
rents in the Schmitt Trigger circuit and thus lead to higher
power consumption.
Table 13–1:
Mod-
ule
Name
PINT0
PINT1
PINT2
PINT3
PINT4
PINT5
r/w
r/w
IRPM0
IRPM1
0
x
x
7
7
PIT3
HW Options
Item
plexers
Port Multi-
0
x
x
6
6
Module specific settings
Interrupt Port Mode Register 0
Interrupt Port Mode Register 1
0
x
x
5
5
DD
PIT2
Address Item
PM.PINT PINT0 U1.7 special in
and AV
0
x
x
4
4
SS
CDC 32xxG-C
0
0
3
3
Initialization
PINT1 U1.6 special in
PINT2 U1.5 special in
PINT3 U8.5 special in
PINT4 U0.5 special in
PINT5 U0.4 special in
may cause quiescent cur-
PIT1
PIT5
0
0
2
2
Setting
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
0
0
1
1
PIT0
PIT4
0
0
0
0
Res
Res
97
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