CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 171
CDC3205G-C
Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
1.CDC3205G-C.pdf
(260 pages)
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PRELIMINARY DATA SHEET
27. CAN Manual
This manual describes the user interface of the CAN module.
For further information about the CAN bus, please refer to
the CAN specification 2.0B from Bosch.
Features
– Bus controller according to CAN Licence Specification
– Supports standard and extended telegrams
– FullCAN: up to 32 Rx and Tx telegrams
– Variable number of receive buffers
– Programmable acceptance filter
– Time stamp for each telegram
– Overwrite mode programmable for each telegram
– Programmable baud rate. Max. 1 MBd @ 8 MHz
Fig. 27–1:
Micronas
1992 2.0B
Single, group or all telegrams received.
CAN
Bus
Block diagram of the CAN bus interface
Bit Timing
Logic
Managem.
Manager
Protocol
Rx/Tx-
Buffer
Logic
Error
June 12, 2003; 6251-579-1PD
– Sleep mode
The CAN interface is a VLSI module which enables coupling
to a serial bus in compliance with CAN specification 2.0B. It
controls the receiving and sending of telegrams, searches for
Tx telegrams and interrupts and carries out acceptance filter-
ing. It supports transmission of telegrams with standard (11
bit) and extended (29 bit) addresses.
The CAN interface can be configured as BasicCAN or Full-
CAN. It enables several active receive and transmit tele-
grams and supports the remote transmission request. The
number of telegrams which can be handled depends mainly
on the size of the communication RAM (16 byte per tele-
gram), the system clock and the transmission speed. A max-
imum of 254 telegrams can be handled.
A mask register makes it possible to receive different groups
of telegram addresses with different receive telegrams.
Transmitting or receiving of a telegram as well as the occur-
rence of an error can trigger an interrupt.
trol and Sta-
Global Con-
tus Register
Managm.
Interface
Logic
CAN RAM
Rx. Obj.
Tx. Obj.
(Com.
Area)
CDC 32xxG-C
CPU
Address
Data
Interrupt
Source
f
0
169
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