CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 86

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
The ETM is controlled via scan chain 6 of the JTAG interface.
The process of remapping or loading code to RAM and exe-
cute it there is a problem for the ETM because one address
can contain different code (overlay). The solution is based on
the requirement that the memory map into which overlays
are loaded exists in multiple places in the address space.
The memory controller of the IC decodes the 24 LSB
address lines A0 to A23. This results in an memory map of
16 MByte. This memory map is repeated 256 times within
the 32 bit ARM core address space of 4 GByte.
Thus it is possible to have one static image of the code being
executed for the trace tool, with different possible overlays
statically linked into the appropriate area of the address
space.
Loading code into the RAM and execute it there means, copy
the code into the RAM and then jump to its overlay. The ETM
sees the full 32 bit address and reports this jump to the trace
tool which has the static image with a memory map for each
configuration at different places of its address space. The
memory controller sees the 24 lower address lines only,
therefore the jump is directed to the correct location.
The supported trace features are listed in Tabel 9–1.
Table 9–1:
84
Features
Demultiplexed trace data format
Multiplexed trace data format
Normal trace data format
Full-rate clocking
Half-rate clocking
Maximum port width
Trace Features
Supported
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-
4/8/16-bit
June 12, 2003; 6251-579-1PD
PRELIMINARY DATA SHEET
Micronas