CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 104

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
The function of the seven remaining registers is given in
Table 14–2.
Table 14–2:
In Port Mode, the Special Input path is always operative. This
allows manipulating the input signal to the specific hardware
module through Normal Output operations by software.
Because register UxPIN allows reading the pin level also in
Special Output mode, the output state of the specific hard-
ware module may be read by the CPU.
14.2.2. LCD Mode
For LCD Mode, the respective UxMODE register bit has to
be set for mode selection.
The function of the seven remaining registers is given in
Table 14–3.
Table 14–3:
By writing segment line data registers, only a master is
changed. Any write to global register ULCDLD will transfer all
master settings to the respective slaves and thereby change
the LC display in one instant.
Registers UxD, UxTRI, UxNS and UxDPM compose a word-
aligned 32bit register and may be accessed by one 32bit
operation.
102
Register
UxD
UxTRI
UxNS
UxDPM
UxSLOW
UxLVL
UxPIN
Register
UxD
UxTRI
UxNS
UxDPM
UxSLOW
UxLVL
UxPIN
Register Functions in Port Mode
Register Functions in LCD Mode
Function
r/w Data register
enable/disable output
select Data register or specific hardware
module as output source
select push-pull or open-drain, double drive
mode for output drivers
enable/disable Port Slow mode for output
drivers
select CMOS or Automotive Schmitt trigger
input level
read pin state
Function
r/w phase 0 segment line data
r/w phase 1 segment line data
r/w phase 2 segment line data
r/w phase 3 segment line data
enable/disable Port Slow mode for output
drivers
no function
no function
June 12, 2003; 6251-579-1PD
The output sequence timing on backplane and segment out-
put ports in LCD Mode is controlled by the LCD module.
Please refer to section LCD Module for information about
operation of this module.
As generation of the backplane port output sequence is fully
done by the LCD module, no segment line data setting is
necessary for these ports.
14.2.3. Port Fast and Slow Modes
Once individual port pins have been enabled for Port Slow
mode by setting registers UxSLOW, set flag SR0.PSLW to
simultaneously enter this mode in all respective ports.
All U-Ports exhibit two operating regions in the DC output
characteristic (see Fig. 14–3). Near zero output voltage the
internal driver transistors operate non-limited, to offer a lin-
ear, low on-resistance. With larger output voltages, however,
the output current folds back to a a limited value. This mea-
sure helps to fight supply current transients and related EMI
noise during port switching.
In the fold-back region, Port Fast mode and Port Slow mode
select two different current limits I
mode sets a limit where the output may even be shorted con-
tinuously to either supply rail. Thus, wired-or configurations
may be realized. The external load resistance should be
greater than 5kOhms in Port Slow mode.
For actually switching to Port Slow mode, both registers UxS-
LOW and SR0.PSLW have to be set. In all other cases, Port
Fast mode is selected.
It is recommended to place all LCD ports in Port Slow mode.
Fig. 14–3:
tic (pull-up characteristic is complementary).
I
I
shf
shs
I
o
0
limited
region
Non-
1V
Typical U-Port pull-down DC output characteris-
2V
PRELIMINARY DATA SHEET
Port Fast Mode
Port Slow Mode
Limited
region
3V
shf
and I
4V
shs
. Port Slow
Micronas
5V
V
ol