SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 810

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 38-5. Logical Address Space for DPR Access:
810
SAM9G45
Configuration examples of UDPHS_EPTCTLx
endpoint type follow below.
Configuration examples of Bulk OUT endpoint type follow below.
• With DMA
• Without DMA:
• With DMA
• Without DMA
64 KB
EP0
64 KB
EP1
64 KB
EP2
64 KB
EP3
– AUTO_VALID: Automatically validate the packet and switch to the next bank.
– EPT_ENABL: Enable endpoint.
– TX_BK_RDY: An interrupt is generated after each transmission.
– EPT_ENABL: Enable endpoint.
– AUTO_VALID: Automatically validate the packet and switch to the next bank.
– EPT_ENABL: Enable endpoint.
– RX_BK_RDY: An interrupt is sent after a new packet has been stored in the endpoint
– EPT_ENABL: Enable endpoint.
Logical address
...
FIFO.
8 to1024 B
8 to1024 B
8 to1024 B
8 to 64 B
8 to 64 B
8 to 64 B
...
...
8 to1024 B
DPR
8 to1024 B
8 to 64 B
8 to1024 B
(UDPHS Endpoint Control
x banks
y banks
z banks
Register) for Bulk IN
6438G–ATARM–19-Apr-11