SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1187

no-image

SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
6438G–ATARM–19-Apr-11
15 Periodic Interval Timer (PIT) ............................................................... 111
16 Watchdog Timer (WDT) ....................................................................... 117
17 Shutdown Controller (SHDWC) .......................................................... 123
18 General Purpose Backup Registers (GPBR) ..................................... 129
19 Bus Matrix (MATRIX) ........................................................................... 131
20 External Memories ............................................................................... 153
15.1
15.2
15.3
15.4
15.5
16.1
16.2
16.3
16.4
16.5
17.1
17.2
17.3
17.4
17.5
17.6
17.7
18.1
18.2
18.3
19.1
19.2
19.3
19.4
19.5
19.6
19.7
20.1
Description .....................................................................................................111
Embedded Characteristics ............................................................................111
Block Diagram ...............................................................................................111
Functional Description ...................................................................................111
Periodic Interval Timer (PIT) User Interface ..................................................113
Description .....................................................................................................117
Embedded Characteristics ............................................................................117
Block Diagram ...............................................................................................117
Functional Description ...................................................................................118
Watchdog Timer (WDT) User Interface .........................................................120
Description .....................................................................................................123
Embedded Characteristics ............................................................................123
Block Diagram ...............................................................................................123
I/O Lines Description .....................................................................................124
Product Dependencies ..................................................................................124
Functional Description ...................................................................................125
Shutdown Controller (SHDWC) User Interface .............................................126
Description .....................................................................................................129
Embedded Characteristics ............................................................................129
General Purpose Backup Registers (GPBR) User Interface ........................129
Description .....................................................................................................131
Embedded Characteristics ............................................................................131
Memory Mapping ...........................................................................................134
Special Bus Granting Mechanism .................................................................134
Arbitration ......................................................................................................136
Write Protect Registers ..................................................................................139
Bus Matrix (MATRIX) User Interface .............................................................140
DDRSDRC0 Multi-port DDRSDR Controller ..................................................153
SAM9G45
iii

Related parts for SAM9G45