SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1149

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Table 46-28. SMC Read Signals - NRD Controlled (READ_MODE= 1) (Continued)
Table 46-29. SMC Read Signals - NCS Controlled (READ_MODE= 0)
46.13.2.3
Table 46-30. SMC Write Signals - NWE Controlled (WRITE_MODE = 1)
6438G–ATARM–19-Apr-11
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Data Hold after NRD High
A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
Parameter
VDDIOM supply
Data Setup before NCS High
Data Hold after NCS High
Data Setup before NCS High
Data Hold after NCS High
NBS0/A0, NBS1, NBS2/A1, NBS3, A2 -
A25 valid before NCS High
NRD low before NCS High
NCS Pulse Width
Write Timings
Parameter
Data Out Valid before NWE High
NWE Pulse Width
NBS0/A0 NBS1, NBS2/A1, NBS3, A2 -
A25 valid before NWE low
NCS low before NWE high
NBS0/A0, NBS1, NBS2/A1, NBS3, A2 -
HOLD or NO HOLD SETTINGS (ncs rd hold
HOLD or NO HOLD SETTINGS (nwe hold
HOLD or NO HOLD SETTINGS (nrd hold
NO HOLD SETTINGS (ncs rd hold = 0)
HOLD SETTINGS (ncs rd hold
HOLD SETTINGS (nwe hold
(ncs rd setup + ncs rd pulse - nrd
(nwe setup - ncs rd setup + nwe
ncs rd pulse length * t
(nrd setup + nrd pulse)* t
(nrd setup + nrd pulse - ncs rd
(ncs rd setup + ncs rd pulse)*
nwe pulse * t
nwe pulse * t
nwe setup * t
nrd pulse * t
setup) * t
pulse) * t
setup)* t
1.8V Supply
t
CPMCK
1.8V
15.0
11.4
15.4
CPMCK
CPMCK
CPMCK
0
0
0
CPMCK
CPMCK
CPMCK
CPMCK
- 3.7
- 3.1
- 0.8
-14.7
CPMCK
0, nwe hold = 0)
0)
0, ncs rd hold = 0)
- 2.9
- 0.7
- 0.5
- 3.3
0, nrd hold =0)
0)
CPMCK
- 0.5
Min
Min
-
(ncs rd setup + ncs rd pulse
ncs rd pulse length * t
(nwe setup - ncs rd setup +
(nrd setup + nrd pulse)*
- nrd setup)* t
(nrd setup + nrd pulse -
nwe pulse) * t
ncs rd setup) * t
nrd pulse * t
nwe pulse * t
nwe pulse * t
nwe setup * t
(ncs rd setup + ncs rd
pulse)* t
t
3.3V Supply
CPMCK
14.7
3.3V
14.1
10.9
- 0.2
CPMCK
0
0
0
- 15.5
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
- 4.4
SAM9G45
- 0.2
- 3.6
- 0.3
- 4.1
- 1.1
CPMCK
- 3.4
-
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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