SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1179

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Revision History
6438G–ATARM–19-Apr-11
Doc. Rev
6438G
Comments
1st Page/headers & footers: (text where found)
Product Line/Product naming convention changed - AT91SAM ARM-based MPU / SAM9G45
Introduction:
Section 5.1 “Power
GNDBU, GNDOSC, GNDUTMI.
Reorganized text describing GND association to power supply pins.
Section 1.
DDRSDRC:
Section 22.7.5 “DDRSDRC Timing 1 Parameter
updated ... “between 0 and 255.”
HSMCI:
Section 36.1
PMC:
Figure 24-2 “Typical Slow Clock Crystal Oscillator
Figure 24-5 “Typical Crystal
Section 25.5 “Processor Clock
RTC:
Section 14.6 “Real Time Clock (RTC) User
SPI:
Section 29.8.2 “SPI Mode
Section 29.3 “Block
SSC:
Section 34.3 “Block
TWI:
Section 31.2 “Embedded
TRNG:
Section 44.2.1 “TRNG Control
UDPHS:
Figure 38-3 “Board
UHPHS:
Figure 37-4 “Board Schematic to Interface UHP High-speed Device
Electrical Characteristics:
Table 46-23, “Analog
Table 46-7, “Main Oscillator
GNDPLL changed to GNDOSC.
Errata:
Section 49.2.7.1 “UHPHS: Packet Loss Issue in the UTMI
Section 49.2.8.1 “UHPHS/UDPHS: USB Does Not Start after
“workaround”.
Section 49.2.2.1 “ECC: Computation with a 1 clock cycle long NRD/NWE
“Description”, updated 2nd pararaph, 1st sentence. “...SAM9G45 supports DDR2....
“Description”, HSMCI supports....SDIO V2.0 specification...
In the tables that follow, the most recent version appears first. The initials “rfo” indicate changes
requested by product experts, or made during proof reading as part of the approval process.
Schematic”, GND changed to GNDUTMI.
Supplies”, replaced ground pin names by GNDIOM, GNDCORE, GNDANA, GNDIOP,
Diagram”, removed extra block diagram.
Diagram”, Removed extra block diagram.
Inputs”, updated Parameter: Input “Source” impedence.
Characteristics”, removed reference to PDC.
Register”, bitfield 5 is occupied by WDRBT.
Connection”, updated with GNDOSC.
Characteristics”, in the footnote, gnd changed to gndosc and in the figure below,
Register”, added KEY bitfield.
Controller”, text revised.
Interface”, typo in section title fixed.
Register”, TXSNR bitfield description, number of cycles
Connection”, updated with GNDOSC.
Transceivers”, added to errata.
Power-up”, added clairifying “Or:” to choices in
Controller”, GND changed to GNDUTMI
pulse”, HECC/ECC typo fixed.
SAM9G45
Change
Request
Ref.
Marcom
7322
rfo:
rfo
7462
7384
7322
7392
7569
7506
rfo
rfo
7384
7531
7332
7332
7519
7332
7595
7352
7384
1179