SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 61
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SAM9G45
Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G45.pdf
(10 pages)
5.SAM9G45.pdf
(55 pages)
6.SAM9G45.pdf
(1196 pages)
Specifications of SAM9G45
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G45 PDF datasheet #4
- SAM9G45 PDF datasheet #5
- SAM9G45 PDF datasheet #6
- Current page: 61 of 1196
- Download datasheet (20Mb)
11.4.2
11.4.2.1
6438G–ATARM–19-Apr-11
Valid Code Detection
ARM Exception Vectors Check
Figure 11-3. Remap Action after Download Completion
The NVM bootloader program initializes the NVM. It initializes the required PIO. It sets the right
peripheral depending on the NVM and tries to access the memory. If the initialization fails, it
restores the reset values for the PIO and peripherals and then the next NVM bootloader program
is executed.
If the initialization is successful, the NVM bootloader program reads the beginning of the NVM
and determines if the NVM contains valid code.
If the NVM does not contain valid code, the NVM bootloader program restores the reset value for
the peripherals and then the next NVM bootloader program is executed.
If valid code is found, this code is loaded from NVM into internal SRAM and executed by branch-
ing at address 0x0000_0000 after remap. This code may be the application code or a second-
level bootloader. All the calls to functions are PC relative and do not use absolute addresses.
There are two kinds of valid code detection. Depending on the NVM bootloader, either one or
both of them is used.
The NVM bootloader program reads and analyzes the first 28 bytes corresponding to the first
seven ARM exception vectors. Except for the sixth vector, these bytes must implement the ARM
instructions for either branch or load PC with PC relative addressing.
Figure 11-4. LDR Opcode
31
1
1
1
28 27
0
0x0000_0000
0x0030_0000
0x0040_0000
0
1
I
24 23
P
U
Internal
Internal
Internal
ROM
SRAM
ROM
1
W 0
20 19
Rn
REMAP
16 15
Rd
Internal
Internal
Internal
SRAM
SRAM
ROM
12 11
0x0000_0000
0x0030_0000
0x0040_0000
SAM9G45
O set
0
61
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