SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 268

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

22.7.9
Name:
Access:
Reset:
The DLL logic is internally used by the controller in order to delay DQS inputs. This is necessary to center the strobe time
and the data valid window.
• MDINC: DLL Master Delay Increment
0 = The DLL is not incrementing the Master delay counter.
1 = The DLL is incrementing the Master delay counter.
• MDDEC: DLL Master Delay Decrement
0 = The DLL is not decrementing the Master delay counter.
1 = The DLL is decrementing the Master delay counter.
• MDOVF
0 = The Master delay counter has not reached its maximum value, or the Master is not locked yet.
1 = The Master delay counter has reached its maximum value, the Master delay counter increment is stopped and the DLL
forces the Master lock. If this flag is set, it means the DDRSDRC clock frequency is too low compared to Master delay line
number of elements.
• MDVAL
Value of the Master delay counter.
268
31
23
15
–
–
7
–
SAM9G45
:
DDRSDRC DLL Register
:
DLL Master Delay Value
DLL Master Delay Overflow Flag
DDRSDRC_DLL
Read-only
See
Table 22-9
30
22
14
–
–
6
–
29
21
13
–
–
5
–
28
20
12
–
–
4
–
MDVAL
27
19
11
–
–
3
–
MDOVF
26
18
10
–
–
2
MDDEC
25
17
–
–
9
1
6438G–ATARM–19-Apr-11
MDINC
24
16
–
–
8
0