AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 98

• Manufacturer Part Number: AT89LP51ED2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ED2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

Table 15-2.
98
CMOD Address = 0D9H
Not Bit Addressable
Bit
Symbol
CIDL
WDTE
CPS
ECF
1-0
AT89LP51RD2/ED2/ID2 Preliminary
CIDL
Function
Counter Idle Control
Clear to allow the PCA Counter to function during Idle Mode. Set to halt the PCA Counter during Idle.
Watchdog Timer Enable
Clear to disable the watchdog timer function on PCA Module 4. Set to enable the watchdog function of PCA Module 4.
PCA Count Pulse Select
CPS1
PCA Enable Counter Overflow Interrupt
Clear to prevent the CF bit in CCON from generating an interrupt. Set to enable CF in CCON as an interrupt source.
7
0
0
1
1
CMOD – PCA Counter Mode Register
CPS0
0
1
0
1
WDTE
The CMOD register includes three additional bits associated with the PCA (See
Table
Figure 15-1. PCA Timer/Counter
The CCON register contains the run control bit for the PCA and the flags for the PCA timer (CF)
and each module (Refer to
6
• The CIDL bit which allows the PCA to stop during idle mode.
• The WDTE bit which enables or disables the watchdog function on module 4. (See
• The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in the CCON
• Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by clearing this
f
PERIPH
Timer 0 Overflow
PCA Clock Input
f
f
Timer 0 Overflow
ECI Input (P1.2)
PERIPH
PERIPH
4
SFR) to be set when the PCA timer overflows.
bit.
and
15-2).
(P1.2) ECI
f
÷(TPS+1)
PERIPH
/(TPS+1) *Note: In Fast Mode TPS is only active when PCAX2 = 1 in CKCON0.
/2
Section
÷2
CIDL
–
5
Idle
15.7)
CPS
0
1
2
3
1-0
–
4
Table
15-3).
CR
–
3
CCAPnL
CL
Modules
To PCA
CCAPnH
CPS1
CH
2
Overflow
Reset Value = 00xx x000B
CPS0
1
CF
ECF
Figure 15-1
ECF
3714A–MICRO–7/11
0
Interrupt
Figure 15-
and