AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 41

• Manufacturer Part Number: AT89LP51ED2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ED2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

5.4.2.3
5.5
3714A–MICRO–7/11
Instruction Set Extensions
Circular Buffers
The CBE0 and CBE1 bits in DSPR can configure DPTR0 and DPTR1, respectively, to operate in
circular buffer mode. The AT89LP51RD2/ED2/ID2 maps circular buffers into two identically
sized regions of EDATA/XDATA. These buffers can speed up convolution computations such as
FIR and IAR digital filters. The length of the buffers are set by the value of the FIRD (E3H) regis-
ter for up to 256 entries. Buffer A is mapped from 0000H to FIRD and Buffer B is mapped from
0100H to 100H+FIRD as shown in
When circular buffer mode is enabled, updates to a data pointer referencing the buffer region will
follow circular addressing rules. If the data pointer is equal to FIRD or 100H+FIRD any incre-
ment will cause it to overflow to 0000H or 0100H respectively. If the data pointer is equal to
0000H or 0100H any decrement will cause it to underflow to FIRD or 100H+FIRD respectively.
In this mode, updates can be either an explicit INC DPTR or an automatic update using DPUn
where the DPDn bits control the direction. The data pointer will increment or decrement normally
at any other addresses. Therefore, when circular addressing is in use, the data pointers can still
operate as regular pointers in the FIRD+1 to 00FFH and greater than 100H+FIRD ranges.
Figure 5-5.
Table 5-10
AT89LP51RD2/ED2/ID2. For more information on the instruction set see
Set Summary” on page
22.1 “Instruction Set Extensions” on page
Table 5-10.
Opcode
A5 A3
A5 00
A5 03
A5 23
A5 73
A5 90
A5 93
lists the additions to the 8051 instruction set that are supported by the
Circular Buffer Mode
AT89LP51RD2/ED2/ID2 Extended Instructions
Mnemonic
BREAK
ASR M
LSL M
JMP @A+PC
MOV /DPTR, #data16
MOVC A, @A+/DPTR
INC /DPTR
175. For detailed descriptions of the extended instructions see
AT89LP51RD2/ED2/ID2 Preliminary
DPTR
DPTR
Figure
0100h
0000h
Description
Software breakpoint
Arithmetic shift right of M register
Logical shift left of M register
Indirect jump relative to PC
Move 16-bit constant to alternate data
pointer
Move code location to ACC relative to
alternate data pointer
Increment alternate data pointer
179.
5-5. Both data pointers may operate in either buffer.
100h + FIRD
FIRD
B
A
Section 22. “Instruction
Bytes
2
2
2
2
4
2
2
Cycles
Section
2
2
2
3
4
4
3
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