AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 188

• Manufacturer Part Number: AT89LP51ED2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ED2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

24.1
188
Memory Organization
AT89LP51RD2/ED2/ID2 Preliminary
The AT89LP51RD2/ED2/ID2 offers 64K bytes of In-System Programmable nonvolatile Flash
code memory and 4K bytes of nonvolatile EEPROM data memory. In addition, the device con-
tains a 512-byte User Signature Array, a 128-byte read-only Atmel Signature Array and 19 User
Configuration Fuses. The memory organization is shown in
code memory and auxiliary memories are divided into pages of 128 bytes each and share a tem-
porary page buffer of 64 bytes (one half page). A single page erase operation will erase an
entire 128-byte page, while a single write operation will only program half of a page. Therefore,
two write operations are required for every erase operation when the whole page must be repro-
grammed. This detail is transparent to the user when using the bootloader or Flash API.
The EEPROM data memory has a page size of 32 bytes and its own 32-byte page buffer. The
EEPROM supports erase/write operations on any number of bytes, 1–32, within a page without
affecting the other bytes in that page.
Figure 24-1. AT89LP51RD2/ED2/ID2 Memory Organization
.
Table 24-1.
Atmel Signature Array
User Signature Array
Atmel Signature
Data EEPROM
User Signature
Code Memory
Code Flash
Memory
User Fuse Row
AT89LP51RD2/ED2/ID2 Memory Organization
OSCCAL
SSB
BSB
SBV
65536 bytes
4096 bytes
512 bytes
128 bytes
Capacity
00
00
Page 511 Low
Page 510 Low
Page 0 Low
Page 0 Low
Page 3 Low
Page 2 Low
Page 1 Low
Page 0 Low
Page 1 Low
Page 0 Low
00
Page Buffer
3F 40
3F
40
Page Size
128 bytes
128 bytes
128 bytes
32 bytes
Page 511 High
Page 510 High
Page 0 High
Page 3 High
Page 2 High
Page 1 High
Page 0 High
Page 1 High
Page 1 High
3F
7F
7F
FFFF
0000
# Pages
Table 24-1
512
128
00
Page Buffer
00
4
1
Page 128
Page 0
1F
1F
0FFF
0000
and
Address Range
0000H – FFFFH
0000H – 0FFFH
0000H – 01FFH
0200H – 027FH
Figure
3714A–MICRO–7/11
Data Memory
24-1. The