AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 92
AT89LP51ED2
Manufacturer Part Number
AT89LP51ED2
Description
Manufacturer
Atmel Corporation
Specifications of AT89LP51ED2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
42
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
7
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
2.25
Eeprom (bytes)
4096
Self Program Memory
API
Operating Voltage (vcc)
2.4 to 5.5
Timers
4
Isp
SPI/OCD/UART
Watchdog
Yes
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Table 14-4.
14.2
92
T2MOD Address = 0C9H
Not Bit Addressable
Symbol
T2OE
DCEN
Bit
Capture Mode
AT89LP51RD2/ED2/ID2 Preliminary
Function
Timer 2 Output Enable
When T2OE = 1 and C/T2 = 0, the T2 pin will toggle after every Timer 2 overflow.
Timer 2 Down Count Enable
When Timer 2 operates in Auto-Reload mode and EXEN2 = 1, setting DCEN = 1 will cause Timer 2 to count up or down
depending on the state of T2EX.
–
7
T2MOD – Timer 2 Mode Control Register
In the Capture mode, Timer 2 is a fixed 16-bit timer or counter that counts up from MIN to MAX.
An overflow from MAX to MIN sets bit TF2 in T2CON. If EXEN2 = 1, a 1-to-0 transition at exter-
nal input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and
RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set.
The EXF2 and TF2 bits can generate an interrupt. Capture mode is illustrated in
The Timer 2 overflow rate in Capture mode is given by the following equation:
Note:
Figure 14-1. Timer 2 Diagram: Capture Mode
–
6
T2EX PI N
T2 PI N
In Fast Mode, TPS applies only when the T2X2 bit in CKCON0 is set. TPS always
applies in Compatibility Mode, therefore setting T2X2 in Compatibility Mode will double
the timeout period.
CLK
SYS
–
5
÷TPS
Capture Mode:
TRANSITION
DETECT OR
–
4
C/T2 = 0
C/T2 = 1
EXEN2
Time-out Period
–
3
TR2
CAPTURE
–
2
RCAP2L
=
TL2
65536
--------------- -
f
SYS
EXF2
Reset Value = 0000 0000B
RCAP2H
TH2
T2OE
×
1
(
TPS
O VERFLO W
+
1
TF2
)
DCEN
0
3714A–MICRO–7/11
Figure
INTERR UPT
TIMER 2
14-1.
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