AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 3

• Manufacturer Part Number: AT89LP51ED2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ED2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

1.3
1.4
3714A–MICRO–7/11
44-pad VQFN/QFN/MLF
40-pin PDIP
Note:
(†MOSI/CEX2/MISO) P1.5
(†MISO/CEX3/SCK) P1.6
(†SCK/CEX4/MOSI) P1.7
† SPI in remap mode
‡ AT89LP51ID2 Only
1. The AT89LP51ID2 is not available in the PDIP package
(†MOSI/CEX2/MISO) P1.5
(†SCK/CEX4/MOSI) P1.7
(†MISO/CEX3/SCL) P1.6
(RXD) P3.0
(INT0) P3.2
(INT1) P3.3
(SDA) P4.1
(DCL) RST
(TXD) P3.1
NOTE:
Bottom pad
should be
soldered to ground
(T0) P3.4
(T1) P3.5
(†SS/CEX1) P1.4
(SS/T2EX) P1.1
(XTAL2A) P4.7
(XTAL1A) P4.6
(CEX0) P1.3
(INT0) P3.2
(INT1) P3.3
(RXD) P3.0
(TXD) P3.1
(ECI) P1.2
(WR) P3.6
(RD) P3.7
1
2
3
4
5
6
7
8
9
10
11
(T2) P1.0
(T0) P3.4
(T1) P3.5
GND
RST
AT89LP51RD2/ED2/ID2 Preliminary
†SPI in remap mode
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VDD
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
POL
P4.4 (ALE)
P4.5 (PSEN)
P2.7 (A15/AIN3)
P2.6 (A14/AIN2)
P2.5 (A13/AIN1)
P2.4 (A12/AIN0)
P2.3 (A11/DAC+)
P2.2 (A10/DAC-)
P2.1 (A9)
P2.0 (A8)
33
32
31
30
29
28
27
26
25
24
23
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
POL
P4.0 (SCL)
P4.4 (ALE)
P4.5 (PSEN)
P2.7 (A15/AIN3)
P2.6 (A14/AIN2)
P2.5 (A13/AIN1)
3