PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 391

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

11.2.2.2 DMA Controller Interrupt Vector
DMA controller interrupt vectors are transferred to the corresponding channel and
direction specific interrupt queues IQSCCiRX and IQSCCiTX respectively.
Table 103
Data Sheet
Source ID
HI
31
15
0
0
30
14
0
Source ID
29
13
0
DMA Controller Interrupt Vectori
000
001
010
011
100
101
110
111
Host Initiated interrupt
This bit indicates that an Host Initiated (HI) interrupt occured, i.e. the
corresponding DMA controller channel detects the ’HI’ bit set to ’1’ in the
receive or transmit descriptor before branching to the next descriptor.
HI=’0’
HI=’1’
28
12
0
2
2
2
2
2
2
2
2
27
11
0
0
26
10
Receive Channel 0 Interrupt Vector (IQSCC0RX)
Receive Channel 1 Interrupt Vector (IQSCC1RX)
Receive Channel 2 Interrupt Vector (IQSCC2RX)
Receive Channel 3 Interrupt Vector (IQSCC3RX)
Transmit Channel 0 Interrupt Vector (IQSCC0TX)
Transmit Channel 1 Interrupt Vector (IQSCC1TX)
Transmit Channel 2 Interrupt Vector (IQSCC2TX)
Transmit Channel 3 Interrupt Vector (IQSCC3TX)
No Host Initiated (HI) interrupt is indicated by this vector.
An Host Initiated (HI) interrupt is indicated by this vector.
0
0
25
0
9
0
24
0
8
0
391
23
0
7
0
22
0
6
0
21
0
5
0
Host Memory Organization
20
0
4
0
19
0
3
0
(Rx/Tx Channel)
18
HI
2
0
PEB 20534
PEF 20534
2000-05-30
17
FI
1
0
ERR
16
0
0