PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 300

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

Data Sheet
RFDF
Receive FIFO Data Format
HDLC modes:
This bit is only valid if the minimum receive FIFO threshold is selected
(bit field RFTH(2..0) = ’000’):
RFDF=’0’
RFDF=’1’
ASYNC/BISYNC modes:
In ASYNC/BISYNC modes, the character format is determined as
follows:
RFDF='0'
data byte:
P
(no parity bit stored)
P: Parity bit stored in data byte, can be disabled via bit 'DPS'
PE: Parity Error
FE: Frame Error
P: Parity bit stored in second data byte (= status byte)
7
7
7
7
P
6
6
P
5
5
Char8
4
Char7
Char6
Char5
A minimum of one byte is stored in the receive FIFO
before forwarded to the central RFIFO.
A minimum of two bytes is stored in the receive FIFO
before forwarded to the central RFIFO.
0
0
0
0
300
RFDF='1'
data byte (d):
P
(no parity bit stored)
7
7
7
7
P
6
6
P
5
5
Char8
4
Char7
Char6
Char5
Detailed Register Description
0
0
0
0
PE
PE
PE
PE
status byte (s):
7
7
7
7
FE
FE
FE
FE
6
6
6
6
PEB 20534
PEF 20534
(all modes)
2000-05-30
P
P
P
P
0
0
0
0