PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 252

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

Table 51
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Data Sheet
Bit 31
Bit 15
IQCFGBAR
30
14
IQCFGBAR:
Interrupt Queue Configuration Base Address Register
This register determins the base address of the configuration interrupt
queue and can be located anywhere in the 32 bit address range.
Note: The interrupt queue base address must be 32-bit aligned, i.e. bit 1
29
13
28
12
and 0 must be set to ’0’.
read/write
0000 0000
003C
written by CPU
evaluated by DSCC4
27
11
H
26
10
H
IQCFGBAR(15:2)
25
IQCFGBAR(31:16)
9
24
252
8
23
7
22
6
Detailed Register Description
21
5
20
4
19
3
18
2
PEB 20534
PEF 20534
2000-05-30
17
1
0
16
0
0
(-)