PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 260

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

Data Sheet
TFFTHRESi
(i = 0...3)
Transmit FIFO Forward Threshold Channel i
These bit fields determine the channel specific Transmit FIFO Forward
Threshold for the corresponding channel i in number of DWORDs.
This threshold controls DMAC operation towards the serial channels
(SCCi).
A watermark is calculated by:
watermark = TFFTHRESH.
As soon as the number of valid data belonging to a new frame in the
central transmit FIFO is greater than the watermark, the DMAC will
provide transmit data to the corresponding SCC. Once having started
one frame, the DMAC will ignore this threshold providing all available
data of the current frame to the SCC. Threshold operation starts again
with the beginning of a new frame. Frames shorter than the threshold will
be transferred as soon as a frame end indication is detected by the
DMAC.
Note: The maximum allowed Transmit FIFO Forward Threshold is:
Note: Programming TFFTHRESHi to zero will disable the threshold
TFFTHRESHi = (TFSIZEi * 4) - 1 DWORDs,
whereas ’TFSIZEi’ is the channel specific central transmit FIFO
partition size programmed in register FIFOCR1
causing the DMAC to transfer all data immediately. This may be
useful for not frame/packet oriented data transmission, e.g. in
ASYNC protocol mode.
260
Detailed Register Description
(TX Channel i)
PEB 20534
PEF 20534
2000-05-30