PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 262

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

Data Sheet
MRFI
MTFI
MRERR
MTERR
Mask Receive FI-Interrupt (Channel i)
This bit enables/disables the receive FI-interrupt indication for the DMA
channel, the register is dedicated to (i=3..0):
MRFI=’0’
MRFI=’1’
Mask Transmit FI-Interrupt (Channel i)
This bit enables/disables the transmit FI-interrupt indication for the DMA
channel, the register is dedicated to (i=3..0):
MTFI=’0’
MTFI=’1’
Mask Receive ERR-Interrupt (Channel i)
This bit enables/disables the receive ERR-interrupt indication for the
DMA channel, the register is dedicated to (i=3..0):
MRERR=’0’
MRERR=’1’
Mask Transmit ERR-Interrupt (Channel i)
This bit enables/disables the transmit ERR-interrupt indication for the
DMA channel, the register is dedicated to (i=3..0):
MTERR=’0’
MTERR=’1’
FI-interrupt generation is enabled for the dedicated DMA
receive channel.
FI-interrupt generation is disabled for the dedicated DMA
receive channel.
FI-interrupt generation is enabled for the dedicated DMA
transmit channel.
FI-interrupt generation is disabled for the dedicated DMA
transmit channel.
ERR-interrupt generation is enabled for the dedicated
DMA receive channel.
ERR-interrupt generation is disabled for the dedicated
DMA receive channel.
ERR-interrupt generation is enabled for the dedicated
DMA transmit channel.
ERR-interrupt generation is disabled for the dedicated
DMA transmit channel.
262
Detailed Register Description
(RX Channel)
(RX Channel)
(TX Channel)
(TX Channel)
PEB 20534
PEF 20534
2000-05-30