PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 109
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PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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Figure 30
The falling LBREQ edge shows the last chance for LBREQ to trigger the indicated
regain-sequence. Even if LBREQ is activated earlier the regain-sequence is initiated by
LHOLD going high. LBREQ and LHOLD are connected via an external arbitration
circuitry. Please note that LHOLD may also be deactivated without the EBC requesting
the bus.
Figure 31
master and the slave. In order to provide correct levels during initialization of the master
and the slave, two external pull-up devices are required. One is connected to the
master’s LHOLD input, the other to the slave’s LHLDA input.
Note: For compatibility reasons with existing applications, these pull-ups can not be
Data Sheet
LHOLD
(input)
LHLDA
(output)
LBREQ
(output)
LCSO
(output)
LRD, LWR
(output signals)
integrated into the chip.
below shows the correct connection of the bus arbitration signals between the
External Bus Arbitration (Regaining the Bus)
109
Multi Function Port (MFP)
PEB 20534
PEF 20534
2000-05-30
ITD10616
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