Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 96

• Manufacturer Part Number: Z16FMC32AG20SG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

PS028702-1210
GATED Mode
In GATED mode, the timer counts only when the timer input signal is in its active state as
determined by the TPOL bit in the Timer Control 1 Register. When the timer input signal
is active, counting begins. A timer interrupt is generated when the timer input signal tran-
sits from active to inactive state or a timer reload occurs. To determine if a timer input sig-
nal deassertion generated the interrupt, read the associated GPIO input value and compare
to the value stored in the TPOL bit.
The timer counts up to the 16-bit reload value stored in the timer reload high and low byte
registers. On reaching the reload value, the timer generates an interrupt, the count value in
the timer high and low byte registers is Reset to
the timer input signal is active. If the timer output alternate function is enabled, the timer
output pin changes state (from Low to High or from High to Low) at timer reload.
Observe the following steps to configure a timer for GATED mode and initiate the count:
1. Write to the timer control registers to:
2. Write to the timer high and low byte registers to set the initial count value. This affects
3. Write to the timer reload high and low byte registers to set the Reload value.
4. Enable the timer interrupt and set the timer interrupt priority by writing to the relevant
5. Configure the timer interrupt to be generated only at the input deassertion event, the
6. Configure the associated GPIO port pin for the timer input alternate function.
7. Write to the Timer Control 1 Register to enable the timer.
8. The timer counts when the timer input is equal to the TPOL bit.
Compare Mode Time(s) =
–
–
–
–
only the first pass in GATED mode. After the first timer Reset in GATED mode,
counting always begins at the reset value of
interrupt registers.
reload event, or both by setting
Disable the timer
Configure the timer for GATED mode
Set the prescale value
Select the active state of the timer input through the TPOL bit
P R E L I M I N A R Y
(Compare Value
TICONFIG
System Clock Frequency (Hz)
Z16FMC Series Motor Control MCUs
field of the Timer Control 0 Register.
0001H
0001H
–
Start Value + 1) x Prescale
.
and counting continues as long as
Product Specification
Timers
74