Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 258

• Manufacturer Part Number: Z16FMC32AG20SG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

PS028702-1210
Bits
9:8
7
6
5
4
3:0
Description (Continued)
SRCCTL – Source control register
00 = Source address does not change
01 = Source address increments
10 = Source address decrements
11 = Reserved
IEOB – Interrupt on end of buffer
0 = Do not generate an interrupt when the DMA completes this buffer
1 = Generate interrupt at the end of this buffer
TXFR – Transfer to new list address. This bit is used only in linked list mode.
0 = Increment DMAxLAR by 16 at the end of this buffer.
1 = Load the DMAxLAR with the new List Address value from the descriptor.
EOF – End of frame
0 = Not an End Of Frame buffer
1 = This buffer is the end of the current frame
HALT – Halt after this buffer. This bit is used only in linked list mode.
0 = Next descriptor is loaded.
1 = The DMA will halt at the end of this buffer.
CMDSTAT – Command Status Field
On the first transfer of a buffer this field is placed on the CMDBUS and the CMDVALID is
asserted.
If the EOF bit is set, the DMA requests a status from the peripheral and places it in this field. In
linked list mode, this field is written back to the descriptor.
The DMA does not use this field it simply passes it on. The definitions of these bits are speci-
fied in each peripheral.
P R E L I M I N A R Y
Z16FMC Series Motor Control MCUs
Product Specification
DMA Controller
236