Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 241

• Manufacturer Part Number: Z16FMC32AG20SG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

DMA Description
PS028702-1210
DMA Register Description
The DMA is used to off load the processor from doing repetitive tasks. DMA transfers
data from one memory address to another memory address. Because all peripherals are
mapped in memory, the DMA transfers data to or from peripherals.
The DMA transfers data from the source address to the destination address. This requires a
read and/or write cycle that is generated by the DMA controller. Each DMA transfer
requires a minimum of two system clock cycles to execute.
The DMA operates in direct or linked list mode. Direct mode and Linked List mode are
almost the same. In Direct mode the software loads the DMA channel registers directly. In
linked list mode the DMA loads its registers from memory.
Each DMA channel consists of 16-bit control register, a 16-bit transfer length register, a
24-bit destination address register, a 24-bit source address register and a 24-bit list address
register (see Figure 46).
Figure 46. DMA Channel Registers
DMA Control (DMACTL)
Transfer Length (TXLN)
Destination Address (DAR)
Source Address (SAR)
List Address (LAR)
P R E L I M I N A R Y
Z16FMC Series Motor Control MCUs
Product Specification
DMA Controller
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