Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 117

• Manufacturer Part Number: Z16FMC32AG20SG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

Table 58. PWM Control 0 Register (PWMCTL0)
PS028702-1210
Bits
Field
RESET
R/W
ADDR
Bit Position
[7]
PWMOFF
[6]
OUTCTL
[5]
ALIGN
[4]
Reserved
[3]
ADCTRIG
[2]
Reserved
[1]
READY
[0]
PWMEN
PWM Control 0 Register
PWMOFF OUTCTL
R/W
7
0
The PWM Control 0 Register (PWMCTL0) controls PWM operation.
Value (H)
1
1
1
1
0
0
1
0
1
0
0
0
0
R/W
6
0
Place PWM outputs in an OFF state
Disable modulator control of the PWM pins. Outputs are in a predefined OFF
state. This action is not dependent on the Reload event.
Reenable modulator control of PWM pins at next PWM Reload event.
PWM output control
PWM outputs are controlled by the pulse-width modulator.
PWM outputs selectively disabled (set to off-state) according to values in the
OUTx bits of the PWMOUT Register.
PWM edge alignment
PWM outputs are edge aligned.
PWM outputs are center aligned.
Reserved.
ADC trigger enable
No ADC trigger pulses.
ADC trigger enabled.
Reserved.
Values ready for next reload event
PWM values (prescale, period and duty cycle) are not ready. Do not use val-
ues in holding registers at next PWM reload event.
PWM values (prescale, period and duty cycle) are ready. Transfer all values
from temporary holding registers to working registers at next PWM reload
event.
PWM Enable
PWM is disabled and enabled PWM output pins are forced to default off-
state. PWM master counter is stopped.
PWM is enabled and PWM output pins are enabled as outputs.
Description
ALIGN
R/W
5
0
P R E L I M I N A R Y
Reserved ADCTRIG Reserved
R/W
4
0
FF_E380H
R/W
Z16FMC Series Motor Control MCUs
3
0
R/W
2
0
Multi-Channel PWM Timer
Product Specification
READY
R/W
1
0
PWMEN
R/W
0
0
95