Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 123

• Manufacturer Part Number: Z16FMC32AG20SG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

Table 65. PWM Input Sample Register (PWMIN)
PS028702-1210
Bit Position
[1]
Fault0INT
[0]
Fault0RST
Bits
Field
RESET
R/W
ADDR
Bit Position
[7]
Reserved
[6]
FAULT
[5:0]
IN2L/IN2H/
IN1L/IN1H/
IN0L/IN0H
PWM Input Sample Register
PWM Output Control Register
Reserved
R
7
0
PWM pin value is sampled by reading this register.
The PWM output control (PWMOUT) register enables modulator control of the six PWM
output signals. Output control is enabled by the OUTCTL bit in the PWMCTL0 Register.
The PWM continues to operate but has no effect on the disabled PWM pins. If a fault con-
dition is detected, all PWM outputs are forced to their selected off state.
Value (H)
Value (H)
0
1
0
1
0
1
0
1
FAULT
R/W
6
0
Description
Fault 0 Interrupt
Interrupt on fault 0 pin assertion disabled.
Interrupt on Fault0 pin assertion enabled.
Fault 0 Restart
Automatic recovery. PWM resumes control of outputs when all fault sources
have deasstered.
S
after all fault sources have deasserted and all fault flags are cleared and a
PWM reload occurs.
Description
Must be 0.
Sample Fault0 pin
A Low-level signal was read on the fault pin.
A High-level signal was read on the fault pin.
Sample PWM pins
A Low-level signal was read on the pins.
A High-level signal was read on the pins.
oftware Controlled Recovery. PWM resumes control of outputs only
IN2L
R/W
5
0
P R E L I M I N A R Y
IN2H
R/W
4
0
FF_E386H
IN1L
R/W
Z16FMC Series Motor Control MCUs
3
0
IN1H
R/W
2
0
Multi-Channel PWM Timer
Product Specification
IN0L
R/W
1
0
IN0H
R/W
0
0
101