Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 130

Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D

Z16FMC32AG20SG

Manufacturer Part Number
Z16FMC32AG20SG
Description
Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet

Specifications of Z16FMC32AG20SG

Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16FMC32AG20SG
Manufacturer:
Zilog
Quantity:
160
Part Number:
Z16FMC32AG20SG
Manufacturer:
Zilog
Quantity:
10 000
LIN-UART
Architecture
PS028702-1210
The Local Interconnect Network Universal Asynchronous Receiver/Transmitters (LIN-
UART) are full-duplex communication channels capable of handling asynchronous data
transfers in standard UART applications as well as providing LIN protocol support.
Features of the LIN-UARTs include:
The LIN-UART consists of three primary functional blocks: transmitter, receiver and
BRG. The LIN-UART’s transmitter and receiver function independently but use the same
baud rate and data format. The basic UART operation is enhanced by the noise filter and
IrDA blocks. Figure 14 displays the LIN-UART architecture.
8-bit asynchronous data transfer
Selectable even and odd-parity generation and checking
Option of one or two stop bits
Selectable MULTIPROCESSOR (9-bit) mode with three configurable interrupt
schemes
Separate transmit and receive interrupts or DMA requests
Framing, parity, overrun and break detection
16-bit Baud Rate Generator (BRG), which functions as a general-purpose timer with
interrupt
Driver enable output for external bus transceivers
LIN protocol support for both MASTER and SLAVE modes:
Configurable digital noise filter on receive data line
Break generation and detection
Selectable slave autobaud
Check Tx versus Rx data when sending
P R E L I M I N A R Y
Z16FMC Series Motor Control MCUs
Product Specification
LIN-UART
108

Related parts for Z16FMC32AG20SG