Z16FMC32AG20SG Zilog, Z16FMC32AG20SG Datasheet - Page 291

Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D

Z16FMC32AG20SG

Manufacturer Part Number
Z16FMC32AG20SG
Description
Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet

Specifications of Z16FMC32AG20SG

Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16FMC32AG20SG
Manufacturer:
Zilog
Quantity:
160
Part Number:
Z16FMC32AG20SG
Manufacturer:
Zilog
Quantity:
10 000
Table 152. On-Chip Debugger Commands
PS028702-1210
Debug Command
Read Revision
Read OCD Status Register
Read OCD Control Register
Write OCD Control Register
Read Registers (CPU registers R15-R0)
Write Registers (CPU registers R15-R0)
Read Program Counter
Write Program Counter
Read Flags
Write Instruction
Read Register (single CPU register)
Write Register (single CPU register)
Read Memory (short -address is sign
extended)
Write Memory (short -address is sign
extended)
Read Each Memory CRC.
CRC of a block each 4K memory block.
The
returned for each 4K block and is reset at the start of each block. The
determines how many blocks of memory to compute the
The On-Chip Debugger commands are summarized in Table 152.
DBG <-- {1111,BlockCount[3:0]}
DBG <-- BlockCount[11:4]
DBG <-- 00h
DBG <-- addr[23:16]
DBG <-- {addr[15:12],xxxx}
DBG ->> MemoryCRC[0:7]
DBG ->> MemoryCRC[8:15]
DBG --> CRC[0:7]
MemoryCRC
is computed on memory in increments of 4K blocks. The CRC is
P R E L I M I N A R Y
The Read memory CRC command computes and return the
Command Byte
0000–0000
0000–0001
0000–0010
0000–0011
0000–0100
0000–0101
0000–0110
0000–0111
0000–1000
0000–1001
0100-(regno[3:0])
0100-(regno[3:0])
0100-(regno[3:0])
0100-(regno[3:0])
Z16FMC Series Motor Control MCUs
Disabled by Read Protect
Option Bit
Cannot single step (bit0 has not
effect)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Read only unprotected memory
locations
Write only unprotected memory
locations
MemoryCRC
Product Specification
BlockCount
on.
On-Chip Debugger
field
269

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