Z16C3516VSG Zilog, Z16C3516VSG Datasheet - Page 252

• Manufacturer Part Number: Z16C3516VSG
• Description: IC 16MHZ Z8500 CMOS ISCC 68-PLCC
• Manufacturer: Zilog
• Series: IUSC™r

Specifications of Z16C3516VSG

• Controller Type: Serial Communications Controller (SCC)
• Interface: USB
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 50mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4690-5; Z16C3516VSG

Application Note
On-Chip Oscillator Design
PRACTICE: CIRCUIT ELEMENT AND LAY OUT CONSIDERATIONS
The discussion now applies prior theory to the practical
application.
Amplifier and Feedback Resistor
The elements of the circuit, internal to the IC, include the
amplifier, feedback resistor, and output resistance. The
amplifier is modeled as a transconductance amplifier with
a gain specified as I
Transconductance/Gain. The loop gain AB = gm x Z1,
where gm is amplifier transconductance (gain) in
amps/volt and Z1 is the load seen by the output. AB must
be greater than unity at and about the frequency of
operation to sustain oscillation.
15-6
OUT
**
*
External components typically: CIN = COUT = 30 to 50 pf (add 10 pf pin cap).
Inside chip, feedback resistor biases the amplifier in the high gm region.
/V
IN
(amps per volt).
DC Bias
Figure 7. Transconductance (gm) Measurement
VIN
CIN
OSC IN
Figure 8. Quartz Oscillator Configuration
V
in
IC Under Test
I
out
Quartz
Rq, f
= (V
Amplifier
out
Gain Measurement Circuit. The gain of the amplifier can
be measured using the circuits of Figures 6 & 7. This may
be necessary to verify adequate gain at the frequency of
interest and in determining design margin.
Gain Requirement vs. Temperature, Frequency and
Supply Voltage. The gain to start and sustain oscillation
(Figure 8) must comply with:
Output Impedance. The output impedance limits power to
the XTAL and provides small phase shift with load cap C2.
V
where:
M is a quartz form factor = (1 + C
gm > 4
– V ) /33)
out
OSC OUT
b
33
2
f
2
COUT
VOUT
Rq C
IN
DC Bias
C
V
OUT
b
**
*
t x M
OUT
/C
IN
UM011001-0601
+ C
OUT
/C
OUT
)
2