LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 96

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

1.
2
Exit Auto Powerdown
The parallel port logic can change powerdown modes when the ECP mode is changed through the ecr
register or when the parallel port mode is changed through the configuration registers.
SERIAL IRQ
The LPC47B27x supports the serial interrupt to transmit interrupt information to the host system. The
serial interrupt scheme adheres to the Serial IRQ Specification for PCI Systems, Version 6.0.
Timing Diagrams for SER_IRQ Cycle
A) Start Frame timing with source sampled a low pulse on IRQ1
Note:
Note 1: Start Frame pulse can be 4-8 clocks wide depending on the location of the device in the PCI
B) Stop Frame Timing with Host using 17 SER_IRQ sampling period.
Note:
Note 1: The next SER_IRQ cycle’s Start Frame pulse may or may not start immediately after the turn-
Note 2: There may be none, one or more Idle states during the Stop Frame.
Note 3: Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
SER_IRQ Cycle Control
There are two modes of operation for the SER_IRQ Start Frame.
1) Quiet (Active) Mode : Any device may initiate a Start Frame by driving the SER_IRQ low for one
clock, while the SER_IRQ is Idle. After driving low for one clock the SER_IRQ must immediately be tri-
stated without at any time driving high. A Start Frame may not be initiated while the SER_IRQ is Active.
The SER_IRQ is Idle between Stop and Start Frames. The SER_IRQ is Active between Start and Stop
Frames. This mode of operation allows the SER_IRQ to be Idle when there are no IRQ/Data transitions
which should be most of the time.
SMSC LPC47B27x
PCI_CLK
SER_IRQ
Drive Source
PCI_CLK
SER_IRQ
ECP is not enabled in the configuration registers.
SPP, PS/2 Parallel port or EPP mode is selected through ecr while in ECP mode.
Driver
H=Host Control; R=Recovery; T=Turn-Around; SL=Slave Control; S=Sample
bridge hierarchy in a synchronous bridge design.
H=Host Control; R=Recovery; T=Turn-Around; S=Sample; I=Idle
around clock of the Stop Frame.
S
FRAME
None
IRQ14
R
IRQ1
SL
or
H
T
START
Host Controller
S
START FRAME
IRQ15
H
IRQ15
FRAME
R
1
T
DATASHEET
R
S
IOCHCK#
None
FRAME
R
T
- 96 -
IRQ0 FRAME IRQ1 FRAME
T
S
None
I
R
2
STOP FRAME
Host Controller
STOP
T
H
S
1
IRQ1
R
R
T
T
NEXT CYCLE
IRQ2 FRAME
S
None
Rev. 04-17-07
START
R
3
T