LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 137

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

SMSC LPC47B27x
UART2 FIFO Control
Shadow
Device Disable
Register
Default = 0x00
VTR POR
GP10
Default = 0x01
on VTR POR
NAME
Read/Write when
register bits[3:2]
=01 AND GP43
REG OFFSET
GP43 register
GP43 register
GP43 pin = 0
bits[3:2] = 01
bits[3:2] ≠ 01
READ-ONLY
When GP43
pin = 1
(R/W)
(hex)
AND
OR
(R)
21
22
23
DATASHEET
UART FIFO Control Shadow 2
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
If “0” (enabled), bits[7:3] have no effect on the devices;
devices are controlled by their respective activate bits. If
“1” (disabled), bits[7:3] override the activate bits in the
configuration registers for each logical block.
Bit[0]: Floppy Write Protect.
0= no effect: floppy write protection is controlled by the
write protect pin or the forced write protect bit (bit 0 of
register 0xF1 in Logical Device 0);
1= Write Protected.
If set to 1, this bit overrides the write protect pin on the part
and the forced write protect bit.
nWRTPRT (to the FDC Core) = (nDS0 AND Force Write
Protect) OR (nDS1 AND Force Write Protect)OR
nWRTPRT (from the FDD Interface) OR Floppy Write
Protect
Note: The Force Write Protect bit is in the FDD Option
configuration register.
Bits[2:1]: Reserved. Return 0 on read.
Bit[3]: Floppy Enable.
0=No effect: FDC controlled by its activate bit;
1=Floppy Disabled
Bit[4]: MPU-401 Serial Port Enable.
0=No effect: MPU-401 UART controlled by its activate bit;
1=MPU-401 UART Disabled
Bit[5]: Serial Port 2 Enable.
0=No effect: UART2 controlled by its activate bit;
1=UART2 Disabled
Bit[6]: Serial Port 1 Enable.
0=No effect: UART1 controlled by its activate bit;
1=UART1 Disabled
Bit[7]: Parallel Port Enable.
0=No effect: PP controled by its activate bit;
1=PP Disabled
General Purpose I/0 bit 1.0
Bit[0] In/Out : =1 Input, =0 Output
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[2] Alternate Function Select
1=J1B1 (Joystick 1, Button 1)
0=GPIO
Bits[6:3] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
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DESCRIPTION
Rev. 04-17-07