LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 86

• Manufacturer Part Number: LPC47B272-MS
• Description: IC CTRLR SUPER I/O LPC 100-QFP
• Manufacturer: SMSC

Specifications of LPC47B272-MS

• Controller Type: I/O Controller
• Interface: LPC
• Voltage - Supply: 3.3V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1019

Once in an extended forward mode the software should wait for the FIFO to be empty before switching
back to mode 000 or 001. In this case all control signals will be deasserted before the mode switch. In an
ecp reverse mode the software waits for all the data to be read from the FIFO before changing back to
mode 000 or 001. Since the automatic hardware ecp reverse handshake only cares about the state of
the FIFO it may have acquired extra data which will be discarded. It may in fact be in the middle of a
transfer when the mode is changed back to 000 or 001. In this case the port will deassert nAutoFd
independent of the state of the transfer. The design shall not cause glitches on the handshake signals if
the software meets the constraints above.
ECP Operation
Prior to ECP operation the Host must negotiate on the parallel port to determine if the peripheral supports
the ECP protocol. This is a somewhat complex negotiation carried out under program control in mode
000.
After negotiation, it is necessary to initialize some of the port bits. The following are required:
Set Direction = 0, enabling the drivers.
Set strobe = 0, causing the nStrobe signal to default to the deasserted state.
Set autoFd = 0, causing the nAutoFd signal to default to the deasserted state.
Set mode = 011 (ECP Mode)
ECP address/RLE bytes or data bytes may be sent automatically by writing the ecpAFifo or ecpDFifo
respectively.
Note that all FIFO data transfers are byte wide and byte aligned. Address/RLE transfers are byte-wide
and only allowed in the forward direction.
The host may switch directions by first switching to mode = 001, negotiating for the forward or reverse
channel, setting direction to 1 or 0, then setting mode = 011. When direction is 1 the hardware shall
handshake for each ECP read data byte and attempt to fill the FIFO. Bytes may then be read from the
ecpDFifo as long as it is not empty.
ECP transfers may also be accomplished (albeit slowly) by handshaking individual bytes under program
control in mode = 001, or 000.
Termination from ECP Mode
Termination from ECP Mode is similar to the termination from Nibble/Byte Modes. The host is permitted to
terminate from ECP Mode only in specific well-defined states. The termination can only be executed while
the bus is in the forward direction. To terminate while the channel is in the reverse direction, it must first be
transitioned into the forward direction.
Command/Data
ECP Mode supports two advanced features to improve the effectiveness of the protocol for some
applications. The features are implemented by allowing the transfer of normal 8 bit data or 8 bit
commands.
When in the forward direction, normal data is transferred when HostAck is high and an 8 bit command is
transferred when HostAck is low.
The most significant bit of the command indicates whether it is a run-length count (for compression) or a
channel address.
When in the reverse direction, normal data is transferred when PeriphAck is high and an 8 bit command is
transferred when PeriphAck is low. The most significant bit of the command is always zero. Reverse
channel addresses are seldom used and may not be supported in hardware.
SMSC LPC47B27x
Reverse Channel Commands (PeripAck Low)
Forward Channel Commands (HostAck Low)
D7
0
1
Run-Length Count (0-127)
(mode 0011 0X00 only)
Channel Address (0-127)
DATASHEET
Table 45 -
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D[6:0]
Rev. 04-17-07