LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 31

IC CTRLR SUPER I/O LPC 100-QFP

LPC47B272-MS

Manufacturer Part Number
LPC47B272-MS
Description
IC CTRLR SUPER I/O LPC 100-QFP
Manufacturer
SMSC
Datasheet

Specifications of LPC47B272-MS

Controller Type
I/O Controller
Interface
LPC
Voltage - Supply
3.3V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1019

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CONFIGURATION CONTROL REGISTER (CCR)
Address 3F7 WRITE ONLY
PC/AT and PS/2 Modes
BIT 0 and 1 DATA RATE SELECT 0 and 1
These bits determine the data rate of the floppy controller. See Table 8 for the appropriate values.
BIT 2 - 7 RESERVED
Should be set to a logical "0"
PS/2 Model 30 Mode
BIT 0 and 1 DATA RATE SELECT 0 and 1
These bits determine the data rate of the floppy controller. See Table 8 for the appropriate values.
BIT 2 NO PRECOMPENSATION
This bit can be set by software, but it has no functionality. It can be read by bit 2 of the DSR when in Model 30 register
mode. Unaffected by software reset.
BIT 3 - 7 RESERVED
Should be set to a logical "0"
Table 9 shows the state of the DENSEL pin. The DENSEL pin is set high after a hardware reset and is unaffected by the
DOR and the DSR resets.
STATUS REGISTER ENCODING
During the Result Phase of certain commands, the Data Register contains data bytes that give the status of the
command just executed.
SMSC LPC47B27x
BIT NO.
7,6
5
4
RESET
COND.
RESET
COND.
IC
SE
EC
SYMBOL
N/A
N/A
7
0
7
0
Interrupt Code 00 - Normal termination of command.
Seek End
Equipment
Check
N/A
N/A
6
0
6
0
NAME
Table 12 - Status Register 0
N/A
N/A
5
0
5
0
command was properly executed and completed without
error.
01 - Abnormal termination of command.
execution was started, but was not successfully
completed.
10 - Invalid command. The requested command could
not be executed.
11 - Abnormal termination caused by Polling.
The FDC completed a Seek, Relative Seek or
Recalibrate command (used during a Sense Interrupt
Command).
The TRK0 pin failed to become a "1" after:
1. 80 step pulses in the Recalibrate command.
2. The Relative Seek command caused the FDC to
DATASHEET
N/A
N/A
4
0
step outward beyond Track 0.
4
0
- 31 -
N/A
N/A
3
0
3
0
NOPREC DRATE
DESCRIPTION
N/A
N/A
2
0
2
DRATE
SEL1
SEL1
1
1
1
1
DRATE
DRATE
SEL0
SEL0
0
0
The specified
0
0
Rev. 04-17-07
Command

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