LPC47B272-MS SMSC, LPC47B272-MS Datasheet - Page 120

IC CTRLR SUPER I/O LPC 100-QFP

LPC47B272-MS

Manufacturer Part Number
LPC47B272-MS
Description
IC CTRLR SUPER I/O LPC 100-QFP
Manufacturer
SMSC
Datasheet

Specifications of LPC47B272-MS

Controller Type
I/O Controller
Interface
LPC
Voltage - Supply
3.3V
Current - Supply
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1019

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Fan x Clock Control, Bit D0
The Fan x Clock Control bit D0 is used to override the Duty Cycle Control for Fan x bits and force F
OUT
always high.
When D0 = “0”, the DCC bits determine the F
duty cycle. When D0 = 1, F
is always high,
OUT
OUT
regardless of the state of the DCC bits.
Fan Control Register
The Fan Control Register is located at 0x58 from base I/O in Logical Device A. The bits are defined
below. See the register description in the Runtime Registers section.
Fan x Count Divisor, Bits D7-D6 / D5-D4
Fan x Count Divisor bit in Fan Control Register is used to determine fan tachometer count. The choices
for the divisor are 1, 2, 4 and 8. See “Fan Tachometer Input” section.
Fan x Clock Multiplier, Bits D3 / D2
The Fan x Clock Multiplier bit is used with the Fan x Clock Source Select bit in the Fan Control Register
and the Fan x Clock Select bit in Fan register to determine the F
.
OUT
When the Fan x Clock Multiplier bit = “0”, no clock multiplier is used. When the Fan x Clock Multiplier
bit = “1”, the clock speed determined by the Fan x Clock Source Select bit is doubled.
Fan x Clock Source Select, Bits D1 / D0
The Fan x Clock Source Select and the Fan x Clock Multiplier bits in the Fan Control register is used
with The Fan x Clock Select bit in the Fan x registers to determine the fan speed F
. See Table 58
OUT
above.
Fan Tachometer Inputs
The LPC47B27x implements fan tachometer inputs for signals from fans equipped with tachometer
outputs.
The part can generate both a PME and an SMI when the fan speed drops below a
predetermined value. See description below.
The clock source for the tachometer count is the 32.768kHz oscillator. The Fan Tachometer Inputs
gate a divided down version of the 32.768kHz oscillator for one period of the Fan signal into an 8-bit
counter (maximum count is 255).
The clock source is determined by the CLK32_PRSN bit in the CLOCKI32 register in logical device A. It
is either the 32.768kHz clock from the CLKI32 pin or an internal 32.765kHz clock derived from the
14MHz clock.
SMSC LPC47B27x
- 120 -
Rev. 04-17-07
DATASHEET

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