AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 81

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

MENDEC logic. The LA (unlatched address) pins are
removed and become the GPSI signals, therefore, only
20 bits of address space is available. The table below
shows the GPSI pin configuration:
To invoke the GPSI signals, follow the procedure below:
1. After reset or I/O read of Reset Address, write 10b
2. Set the ENTST bit in CSR4
3. Set the GPSIEN bit in CSR124 (see note below)
Note:
The GPSI Function is available only in the Bus Master Mode of operation.
Receive Data
Receive Clock
Receive Carrier Sense
Collision
Transmit Clock
Transmit Enable
Transmit Data
to PORTSEL bits in CSR15.
GPSI Function
I/O Type
GPSI
O
O
I
I
I
I
I
GPSI Pin
GPSI Pin Configurations
LANCE
RENA
RCLK
CLSN
TENA
TCLK
RX
TX
Am79C961A
PCnet-ISA II
(The pins LA17–LA23 will change function after the
completion of the above three steps.)
4. Clear the ENTST bit in CSR4
5. Clear Media Select bits in ISACSR2
6. Define the PORTSEL bits in the MODE register
Note: LA pins will be tristated before writing to GPSIEN bit.
After writing to GPSIEN, LA[17–21] will be inputs, LA[22–23]
will be outputs.
GPSI Pin
SRDCLK
STDCLK
RXCRS
RXDAT
TXDAT
CLSN
TXEN
(CSR15) to be 10b to define GPSI port. The MODE
register image is in the initialization block.
PCnet-ISA II
Pin Number
10
11
12
5
6
7
9
PCnet-ISA II Normal
Pin Function
LA17
LA18
LA19
LA20
LA21
LA22
LA23
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