AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 67

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AM79C961AVIW

Manufacturer Part Number
AM79C961AVIW
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM79C961AVIW

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / Rohs Status
Not Compliant
Polling
When there is no channel activity and there is no pre-
or post-receive or transmit activity being performed by
the PCnet-ISA II controller then the PCnet-ISA II con-
troller will periodically poll the current receive and
transmit descriptor entries in order to ascertain their
ownership. If the DPOLL bit in CSR4 is set, then the
transmit polling function is disabled.
RES
TLEN
RLEN
CSR2
IADR[23:16]
RES
PADRF[47:32]
LADRF[15:0]
LADRF[31:16]
LADRF[47:32]
LADRF[63:48]
RES
PADR[31:16]
Initialization
PADR[15:0]
RDRA[15:0]
TDRA[15:0]
24-Bit Base Address
MODE
Block
Initialization Block
Pointer to
RDRA[23:16]
TDRA[23:16]
IADR[15:0]
Initialization Block and Descriptor Rings
CSR1
Am79C961A
Buffers
Buffers
XMT
RCV
1st desc.
start
A typical polling operation consists of the following: The
PCnet-ISA II controller will use the current receive
descriptor address stored internally to vector to the
appropriate Receive Descriptor Table Entry (RDTE). It
will then use the current transmit descriptor address
(stored internally) to vector to the appropriate Transmit
Descriptor Table Entry (TDTE). These accesses will be
made to RMD1 and RMD0 of the current RDTE and
TMD1 and TMD0 of the current TDTE at periodic poll-
RMD0
1st desc.
start
TMD0
RX DESCRIPTOR RINGS
RX DESCRIPTOR RINGS
RX DESCRIPTOR RINGS
Buffer 1
Buffer 1
Data
Data
RMD1 RMD2
N
TMD1
RCV Descriptor
M
XMT Descriptor
Ring
Ring
Buffer 2
TMD2
Buffer 2
N
Data
Data
M
RMD3
TMD3
N
M
2nd desc.
start
2nd desc.
start
RMD0
N
TMD0
M
Buffer
Buffer
Data
Data
N
M
19364B-15
67

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