AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 54

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

PLUG AND PLAY LOGICAL DEVICE CONFIGURATION REGISTERS
The PCnet-ISA II controller supports a subset of the
defined Plug and Play logical device control registers.
The reason for only supporting a subset of the registers
is that the PCnet-ISA II controller does not require as
many system resources as Plug and Play allows. For
54
Name
Memory base address
bits[23:16] descriptor 0
Memory base address
bits [15:08] descriptor 0
Memory control
Memory upper limit
address;
bits [23:16] or range
length;
bits [15:08] for
descriptor 0
Memory upper limit
bits [15:08] or range
length;
bits [15:08] for
descriptor 0
Memory descriptor 1
Name
Activate
I/O Range Check
Name
I/O port base address
bits[15:08] descriptor 0
I/O port base address
bits[07:00] descriptor 0
0x48-0x4C
Port Value
Register
Register
Address
Index
Index
0x40
0x41
0x42
0x43
0x44
0x60
0x61
0x30
0x31
Plug and Play Logical Device Control Registers
Memory Space Configuration
Definition
Read/write value indicating the selected memory base address bits[23:16] for
memory descriptor 0. This is the Boot Prom Space.
Read/write value indicating the selected memory base address bits[15:08] for
memory descriptor 0.
Bit[1] specifies 8/16-bit control. The encoding relates to memory control
(bits[4:3]) of the information field in the memory descriptor.
Bit[0], =0, indicates the next field is used as a range length for decode
(implies range length and base alignment of memory descriptor are equal).
Bit[0] is read-only.
Read/write value indicating the selected memory high address bits[23:16] for
memory descriptor 0.
If bit[0] of memory control is 0, this is the range length.
If bit[0] of memory control is 1, this is considered invalid.
Read/write value indicating the selected memory high address bits[15:08] for
memory descriptor 0, either a memory address or a range length as described
above.
Memory descriptor 1. This is the SRAM Space for Shared Memory.
Definition
Read/write value indicating the selected I/O lower limit address bits[15:08] for
I/O descriptor 0. If a logical device indicates it only uses 10 bit encoding, then
bits[15:10] do not need to be supported.
Read/write value indicating the selected I/O lower limit address bits[07:00] for
I/O descriptor 0.
Definition
For each logical device there is one activate register that controls whether or
not the logical device is active on the ISA bus. Bit[0], if set, activates the logical
device. Bits[7:1] are reserved and must be zero. This is a read/write register.
Before a logical device is activated, I/O range check must be disabled.
This register is used to perform a conflict check on the I/O port range
programmed for use by a logical device.
Bit[7:2] Reserved
Bit 1[1] Enable I/O Range check, if set then I/O Range Check is enabled. I/O
range check is only valid when the logical device is inactive.
Bit[0], if set, forces the logical device to respond to I/O reads of the logical
device’s assigned I/O range with a 0x55 when I/O range check is in operation.
If clear, the logical device drives 0xAA. This register is read/write.
I/O Space Configuration
Am79C961A
instance, Memory Descriptor 2 is not used, as the PC-
net-ISA II controller only requires two memor y
descriptors, one for the Boot PROM/Flash, and one for
the SRAM in Shared Memory Mode.